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authorRob Herring <robh@kernel.org>2023-09-25 17:05:06 -0500
committerRob Herring <robh@kernel.org>2023-10-30 16:06:02 -0500
commit70b416afc99863d9f5a5959f6555bbb290d70eee (patch)
treed47d310f85084b0b3a25fe6b807f298d5b66ae3c /Documentation
parent5027cf58e402351bf5585d3d22fb8d92056782eb (diff)
dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes
Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Adding additionalProperties constraint on 'trig-conns' nodes results in warnings that 'cpu' and 'arm,cs-dev-assoc' are not allowed. These are already defined for the parent node, but need to be duplicated for the child node. Drop the free form description that the properties also apply to the child nodes. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Link: https://lore.kernel.org/r/20230925220511.2026514-2-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml33
1 files changed, 24 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
index b9bdfc8969cd..2d5545a2b49c 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
@@ -93,9 +93,7 @@ properties:
cpu:
description:
- Handle to cpu this device is associated with. This must appear in the
- base cti node if compatible string arm,coresight-cti-v8-arch is used,
- or may appear in a trig-conns child node when appropriate.
+ Handle to cpu this CTI is associated with.
power-domains:
maxItems: 1
@@ -112,12 +110,12 @@ properties:
description:
defines a phandle reference to an associated CoreSight trace device.
When the associated trace device is enabled, then the respective CTI
- will be enabled. Use in a trig-conns node, or in CTI base node when
- compatible string arm,coresight-cti-v8-arch used. If the associated
- device has not been registered then the node name will be stored as
- the connection name for later resolution. If the associated device is
- not a CoreSight device or not registered then the node name will remain
- the connection name and automatic enabling will not occur.
+ will be enabled. Use in CTI base node when compatible string
+ arm,coresight-cti-v8-arch used. If the associated device has not been
+ registered then the node name will be stored as the connection name for
+ later resolution. If the associated device is not a CoreSight device or
+ not registered then the node name will remain the connection name and
+ automatic enabling will not occur.
# size cells and address cells required if trig-conns node present.
"#size-cells":
@@ -129,6 +127,8 @@ properties:
patternProperties:
'^trig-conns@([0-9]+)$':
type: object
+ additionalProperties: false
+
description:
A trigger connections child node which describes the trigger signals
between this CTI and another hardware device. This device may be a CPU,
@@ -140,6 +140,21 @@ patternProperties:
reg:
maxItems: 1
+ cpu:
+ description:
+ Handle to cpu this trigger connection is associated with.
+
+ arm,cs-dev-assoc:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ defines a phandle reference to an associated CoreSight trace device.
+ When the associated trace device is enabled, then the respective CTI
+ will be enabled. If the associated device has not been registered
+ then the node name will be stored as the connection name for later
+ resolution. If the associated device is not a CoreSight device or
+ not registered then the node name will remain the connection name
+ and automatic enabling will not occur.
+
arm,trig-in-sigs:
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1