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authorPalmer Dabbelt <palmer@rivosinc.com>2022-03-21 16:07:12 -0700
committerPalmer Dabbelt <palmer@rivosinc.com>2022-03-21 16:07:12 -0700
commit6ae1af9ca0e81f7123d36eae9bf25de63722fbf6 (patch)
treedea03a8690293aa090158154a27b1e36dd99f768 /MAINTAINERS
parent6b57ac02b45f7f676c81b1357e7e5d63a974bf60 (diff)
parent33363c336516e4beb9dd7e8265b369ff96d07dcb (diff)
perf: RISC-V: Add support for SBI PMU and Sscofpmf
This series improves perf support for RISC-V based system using SBI PMU and Sscofpmf extensions, by adding a new generic RISC-V perf framework along with a pair of drivers: one that usese the new performance-monitoring extensions and one that keeps support for the existing systems that only have the legacy counters. Tested-by: Nikita Shubin <n.shubin@yadro.com> * palmer/riscv-pmu: MAINTAINERS: Add entry for RISC-V PMU drivers Documentation: riscv: Remove the old documentation RISC-V: Add sscofpmf extension support RISC-V: Add perf platform driver based on SBI PMU extension RISC-V: Add RISC-V SBI PMU extension definitions RISC-V: Add a simple platform driver for RISC-V legacy perf RISC-V: Add a perf core library for pmu drivers RISC-V: Add CSR encodings for all HPMCOUNTERS RISC-V: Remove the current perf implementation
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS9
1 files changed, 9 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 779a550dc95b..e4c3f7507665 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16561,6 +16561,15 @@ S: Maintained
F: drivers/mtd/nand/raw/r852.c
F: drivers/mtd/nand/raw/r852.h
+RISC-V PMU DRIVERS
+M: Atish Patra <atishp@atishpatra.org>
+R: Anup Patel <anup@brainfault.org>
+L: linux-riscv@lists.infradead.org
+S: Supported
+F: drivers/perf/riscv_pmu.c
+F: drivers/perf/riscv_pmu_legacy.c
+F: drivers/perf/riscv_pmu_sbi.c
+
RISC-V ARCHITECTURE
M: Paul Walmsley <paul.walmsley@sifive.com>
M: Palmer Dabbelt <palmer@dabbelt.com>