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| author | Mark Brown <broonie@kernel.org> | 2019-04-02 16:20:47 +0700 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-04-02 16:20:47 +0700 |
| commit | 6d5e2bf9d203e4d9e08ca2e9420c6ff22ad190af (patch) | |
| tree | c2c20648773d3326f942e34ef73b06566f7a19ec /arch/arc/plat-eznps/Kconfig | |
| parent | b820d52e7eed7b30b2dfef5f4213a2bc3cbea6f3 (diff) | |
| parent | 257f9053c0204ea47491aa236004fd1226f75fa8 (diff) | |
Merge branch 'acpi-utils' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm into asoc-5.2
Diffstat (limited to 'arch/arc/plat-eznps/Kconfig')
| -rw-r--r-- | arch/arc/plat-eznps/Kconfig | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arc/plat-eznps/Kconfig b/arch/arc/plat-eznps/Kconfig index 8eff057efcae..2eaecfb063a7 100644 --- a/arch/arc/plat-eznps/Kconfig +++ b/arch/arc/plat-eznps/Kconfig @@ -26,8 +26,8 @@ config EZNPS_MTM_EXT help Here we add new hierarchy for CPUs topology. We got: - Core - Thread + Core + Thread At the new thread level each CPU represent one HW thread. At highest hierarchy each core contain 16 threads, any of them seem like CPU from Linux point of view. @@ -35,10 +35,10 @@ config EZNPS_MTM_EXT core and HW scheduler round robin between them. config EZNPS_MEM_ERROR_ALIGN - bool "ARC-EZchip Memory error as an exception" - depends on EZNPS_MTM_EXT - default n - help + bool "ARC-EZchip Memory error as an exception" + depends on EZNPS_MTM_EXT + default n + help On the real chip of the NPS, user memory errors are handled as a machine check exception, which is fatal, whereas on simulator platform for NPS, is handled as a Level 2 interrupt |