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authorVineet Gupta <vgupta@synopsys.com>2015-02-11 18:37:43 +0530
committerVineet Gupta <vgupta@synopsys.com>2019-10-28 12:12:32 -0700
commit0fb1f35ed9cc2115a88cc73a02e56d288bf2aa8f (patch)
tree71099784d49368fc03c37ac966bfcc1bb25ce636 /arch/arc
parentcfd9d70a855edf6adb37d0ed88be9e35274dbe49 (diff)
ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
-rw-r--r--arch/arc/mm/tlbex.S10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index d6fbdeda400a..110c72536e8b 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -122,17 +122,27 @@ ex_saved_reg1:
#else /* ARCv2 */
.macro TLBMISS_FREEUP_REGS
+#ifdef CONFIG_ARC_HAS_LL64
+ std r0, [sp, -16]
+ std r2, [sp, -8]
+#else
PUSH r0
PUSH r1
PUSH r2
PUSH r3
+#endif
.endm
.macro TLBMISS_RESTORE_REGS
+#ifdef CONFIG_ARC_HAS_LL64
+ ldd r0, [sp, -16]
+ ldd r2, [sp, -8]
+#else
POP r3
POP r2
POP r1
POP r0
+#endif
.endm
#endif