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authorTony Lindgren <tony@atomide.com>2020-03-04 08:10:43 -0800
committerTony Lindgren <tony@atomide.com>2020-03-04 08:10:43 -0800
commit3b6ff6bb5a8a53cf0c29fb51c5f7a14942cff90c (patch)
tree4987ade80bb4aa484cec0e2f8b9b068e31cb1670 /arch/arm/boot/dts/am4372.dtsi
parentc4f4728b03f61b967f4fba023b8aaec6ddaedb46 (diff)
ARM: dts: Move am437x dss to the interconnect target module in l4
On am437x, the display subsystem (DSS) is on l4. We already have the interconnect target module for it, so let's just move dss there. To do that, we need to adjust the module addresses for the ranges, and use the ranges already added earlier based on reading the l4 interconnect instance AP registers. Cc: Jyri Sarha <jsarha@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am4372.dtsi')
-rw-r--r--arch/arm/boot/dts/am4372.dtsi32
1 files changed, 0 insertions, 32 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index faa14dc0faff..830cce2bda2b 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -394,38 +394,6 @@
};
};
- dss: dss@4832a000 {
- compatible = "ti,omap3-dss";
- reg = <0x4832a000 0x200>;
- status = "disabled";
- ti,hwmods = "dss_core";
- clocks = <&disp_clk>;
- clock-names = "fck";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- dispc: dispc@4832a400 {
- compatible = "ti,omap3-dispc";
- reg = <0x4832a400 0x400>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "dss_dispc";
- clocks = <&disp_clk>;
- clock-names = "fck";
-
- max-memory-bandwidth = <230000000>;
- };
-
- rfbi: rfbi@4832a800 {
- compatible = "ti,omap3-rfbi";
- reg = <0x4832a800 0x100>;
- ti,hwmods = "dss_rfbi";
- clocks = <&disp_clk>;
- clock-names = "fck";
- status = "disabled";
- };
- };
-
ocmcram: sram@40300000 {
compatible = "mmio-sram";
reg = <0x40300000 0x40000>; /* 256k */