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authorRoger Quadros <rogerq@ti.com>2016-04-07 13:25:38 +0300
committerTony Lindgren <tony@atomide.com>2016-04-12 14:32:02 -0700
commit99a4101182d6107af869fb6d41cb375c717c66ad (patch)
tree5a6a3f197866acec96ba4b0ba46e9bfc6b69620c /arch/arm/boot/dts/am437x-gp-evm.dts
parenta23fc15584871ad5a5b6621768a2b17b645ff22d (diff)
ARM: dts: am437x: Provide NAND ready pin
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 16516 KiB/ to 18813 KiB/s and write speed was unchanged at 9941 KiB/s. Measured using mtd_speedtest.ko. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am437x-gp-evm.dts')
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 95ec82a77e67..5bcd3aa025bc 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -817,6 +817,7 @@
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
+ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;