diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2018-07-24 14:24:02 +1000 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2018-07-25 17:38:03 +0930 |
| commit | 2450ceaf21798183f51bfdbd7d314635dbb62f4c (patch) | |
| tree | 568f4fb920bd56a9977b419b6b8d6192f0b29c12 /arch/arm/boot/dts/aspeed-g5.dtsi | |
| parent | a2df75ab0aba98daf7fa4828cf8a669c636c6382 (diff) | |
ARM: dts: aspeed: Add coprocessor interrupt controller
Add a node for the CVIC (the coprocessor interrupt controller) and
add a label to the SRAM node so it can be referenced from the board
device-tree file.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 02e70ad3ab70..87fdc146ff52 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -127,6 +127,13 @@ reg = <0x1e6c0080 0x80>; }; + cvic: copro-interrupt-controller@1e6c2000 { + compatible = "aspeed,ast2500-cvic", "aspeed-cvic"; + valid-sources = <0xffffffff>; + copro-sw-interrupts = <1>; + reg = <0x1e6c2000 0x80>; + }; + mac0: ethernet@1e660000 { compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; reg = <0x1e660000 0x180>; @@ -229,7 +236,7 @@ status = "disabled"; }; - sram@1e720000 { + sram: sram@1e720000 { compatible = "mmio-sram"; reg = <0x1e720000 0x9000>; // 36K }; |