diff options
| author | Joel Stanley <joel@jms.id.au> | 2018-04-19 13:50:02 +0930 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2019-04-05 14:03:03 +1030 |
| commit | e1920e704829f00cdfe6131f51f23dbe590b217f (patch) | |
| tree | 1d2dc2b78a3e6c3be7d4d58a9d991d587a067f8b /arch/arm/boot/dts/aspeed-g5.dtsi | |
| parent | 66e7ff850f5213fb0a20fc28ddfd8b07604eaff6 (diff) | |
ARM: dts: aspeed-g5: Add resets and clocks to GFX node
The ast2500 has a reset for the CRT device that must be deasserted
before it can be used. Similarly it has a clock gate for a clock called
D1CLK that must be set to running.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 85ed9dbec196..04221188b64a 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -232,6 +232,10 @@ compatible = "aspeed,ast2500-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; + clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; + resets = <&syscon ASPEED_RESET_CRT1>; + status = "disabled"; + interrupts = <0x19>; }; adc: adc@1e6e9000 { |