diff options
author | Eddie James <eajames@linux.ibm.com> | 2021-09-16 16:00:45 -0500 |
---|---|---|
committer | Joel Stanley <joel@jms.id.au> | 2021-09-22 13:01:04 +0930 |
commit | eaad40466bd715c4b342ac9f7c889f5281714feb (patch) | |
tree | cb4f5ce15b205ff8867ae47b4ab91b10543057cf /arch/arm/boot/dts/aspeed-g6.dtsi | |
parent | 1390293eac487166fc6a4b11060c6ac84ad5fc39 (diff) |
ARM: dts: aspeed: Add ADC for AST2600 and enable for Rainier and Everest
Add the ADC nodes to the AST2600 devicetree. Enable ADC1 for Rainier and
Everest systems and add an iio-hwmon node for the 7th channel to report
the battery voltage.
Tested on Rainier:
~# cat /sys/class/hwmon/hwmon11/in1_input
1347
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210916210045.31769-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g6.dtsi')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g6.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 1b47be1704f8..ee171b3364fa 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -364,6 +364,26 @@ status = "disabled"; }; + adc0: adc@1e6e9000 { + compatible = "aspeed,ast2600-adc0"; + reg = <0x1e6e9000 0x100>; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_ADC>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + status = "disabled"; + }; + + adc1: adc@1e6e9100 { + compatible = "aspeed,ast2600-adc1"; + reg = <0x1e6e9100 0x100>; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_ADC>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + status = "disabled"; + }; + gpio0: gpio@1e780000 { #gpio-cells = <2>; gpio-controller; |