summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/at91-sama5d2_xplained.dts
diff options
context:
space:
mode:
authorNicolas Ferre <nicolas.ferre@atmel.com>2016-01-12 15:55:12 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2016-01-27 11:14:22 +0100
commit6c482fd15d4ff211ce0e63a628cbda17201b33a0 (patch)
tree797986d3e240d1e3ee58e8be1bf01433d5db707a /arch/arm/boot/dts/at91-sama5d2_xplained.dts
parent1a469ae2ced763fc0d4edb3c9d7b4188deee950c (diff)
ARM: dts: at91: sama5d2 xplained: add phy address and IRQ for macb0
After 57a38effa598 (net: phy: micrel: disable broadcast for KSZ8081/KSZ8091) the macb0 interface has difficulties to come back from power saving mode if address not explicitly set up. As the micrel phy on the board is actually configured to show up at address 1 we use this explicitly. Adding the phy node and its real address fixes the issue. The phy IRQ and associated pinmux node is also added. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: stable@vger.kernel.org # 4.4+ // manual merge needed
Diffstat (limited to 'arch/arm/boot/dts/at91-sama5d2_xplained.dts')
-rw-r--r--arch/arm/boot/dts/at91-sama5d2_xplained.dts12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 77ddff036409..e683856c507c 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -114,9 +114,15 @@
macb0: ethernet@f8008000 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_macb0_default>;
+ pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
phy-mode = "rmii";
status = "okay";
+
+ ethernet-phy@1 {
+ reg = <0x1>;
+ interrupt-parent = <&pioA>;
+ interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
+ };
};
pdmic@f8018000 {
@@ -300,6 +306,10 @@
bias-disable;
};
+ pinctrl_macb0_phy_irq: macb0_phy_irq {
+ pinmux = <PIN_PC9__GPIO>;
+ };
+
pinctrl_pdmic_default: pdmic_default {
pinmux = <PIN_PB26__PDMIC_DAT>,
<PIN_PB27__PDMIC_CLK>;