diff options
| author | Richard Schleich <rs@noreya.tech> | 2021-12-18 21:00:09 +0100 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2022-01-31 16:27:51 -0800 |
| commit | bdf8762da268d2a34abf517c36528413906e9cd5 (patch) | |
| tree | 11a3d780a84c074f444f5630c8d5b2e874064e28 /arch/arm/boot/dts/bcm2711.dtsi | |
| parent | 441d531ec9b766f49e01c107a3043235daa4493f (diff) | |
ARM: dts: bcm2837: Add the missing L1/L2 cache information
This patch fixes the kernel warning
"cacheinfo: Unable to detect cache hierarchy for CPU 0"
for the bcm2837 on newer kernel versions.
Signed-off-by: Richard Schleich <rs@noreya.tech>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
[florian: Align and remove comments matching property values]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm2711.dtsi')
0 files changed, 0 insertions, 0 deletions