diff options
| author | Richard Schleich <rs@noreya.tech> | 2021-12-21 23:48:30 +0100 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2022-02-11 14:23:38 -0800 |
| commit | 618682b350990f8f1bee718949c4b3858711eb58 (patch) | |
| tree | ce7dcebec69c9ac702afbab131e7f44459260333 /arch/arm/boot/dts/bcm2835.dtsi | |
| parent | bdf8762da268d2a34abf517c36528413906e9cd5 (diff) | |
ARM: dts: bcm2711: Add the missing L1/L2 cache information
This patch fixes the kernel warning
"cacheinfo: Unable to detect cache hierarchy for CPU 0"
for the bcm2711 on newer kernel versions.
Signed-off-by: Richard Schleich <rs@noreya.tech>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
[florian: Align and remove comments matching property values]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm2835.dtsi')
0 files changed, 0 insertions, 0 deletions