diff options
| author | Stephen Warren <swarren@wwwdotorg.org> | 2013-02-19 21:39:58 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@wwwdotorg.org> | 2013-03-11 21:38:58 -0600 |
| commit | 6ce5f02ef7edd33ebdac27953b52c489a6005e6d (patch) | |
| tree | 2c7b6b244a5ef0fd21001ae529c295ee292a3bd7 /arch/arm/boot/dts/bcm2835.dtsi | |
| parent | f6161aa153581da4a3867a2d1a7caf4be19b6ec9 (diff) | |
ARM: bcm2835: add SPI device to DT
The BCM2835 has a single instance of the "SPI0"-type SPI master
controller. Instantiate it in the SoC .dtsi file, Don't enable it in
the Raspberry Pi board .dts file, since we have no idea what is actually
connected, and hence no idea what to set the bus clock rate to.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'arch/arm/boot/dts/bcm2835.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm2835.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 4bf2a8774aa7..3eb60f7aa1fe 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -64,6 +64,16 @@ #interrupt-cells = <2>; }; + spi: spi@20204000 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7e204000 0x1000>; + interrupts = <2 22>; + clocks = <&clk_spi>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c0: i2c@20205000 { compatible = "brcm,bcm2835-i2c"; reg = <0x7e205000 0x1000>; @@ -107,5 +117,12 @@ #clock-cells = <0>; clock-frequency = <150000000>; }; + + clk_spi: spi { + compatible = "fixed-clock"; + reg = <2>; + #clock-cells = <0>; + clock-frequency = <250000000>; + }; }; }; |