diff options
| author | Rafał Miłecki <rafal@milecki.pl> | 2020-11-11 15:55:38 +0100 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-11-11 20:38:16 -0800 |
| commit | 776461b1795b4dc4084894cf53399044aafa1d21 (patch) | |
| tree | 4292c7ab9ac97b36ac7500ccb1765d9472b74ac4 /arch/arm/boot/dts/bcm5301x.dtsi | |
| parent | c862059875cffc013ee27bf9759ac288224e7a14 (diff) | |
ARM: dts: BCM5301X: Move CRU devices to the CRU node
Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
"Central Resource Unit").
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm5301x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm5301x.dtsi | 51 |
1 files changed, 26 insertions, 25 deletions
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index bcb32fc698ab..90c09c48721b 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -428,6 +428,26 @@ #address-cells = <1>; #size-cells = <1>; + lcpll0: lcpll0@100 { + #clock-cells = <1>; + compatible = "brcm,nsp-lcpll0"; + reg = <0x100 0x14>; + clocks = <&osc>; + clock-output-names = "lcpll0", "pcie_phy", + "sdio", "ddr_phy"; + }; + + genpll: genpll@140 { + #clock-cells = <1>; + compatible = "brcm,nsp-genpll"; + reg = <0x140 0x24>; + clocks = <&osc>; + clock-output-names = "genpll", "phy", + "ethernetclk", + "usbclk", "iprocfast", + "sata1", "sata2"; + }; + pinctrl: pin-controller@1c0 { compatible = "brcm,bcm4708-pinmux"; reg = <0x1c0 0x24>; @@ -454,32 +474,13 @@ function = "uart1"; }; }; - }; - }; - - lcpll0: lcpll0@1800c100 { - #clock-cells = <1>; - compatible = "brcm,nsp-lcpll0"; - reg = <0x1800c100 0x14>; - clocks = <&osc>; - clock-output-names = "lcpll0", "pcie_phy", "sdio", - "ddr_phy"; - }; - genpll: genpll@1800c140 { - #clock-cells = <1>; - compatible = "brcm,nsp-genpll"; - reg = <0x1800c140 0x24>; - clocks = <&osc>; - clock-output-names = "genpll", "phy", "ethernetclk", - "usbclk", "iprocfast", "sata1", - "sata2"; - }; - - thermal: thermal@1800c2c0 { - compatible = "brcm,ns-thermal"; - reg = <0x1800c2c0 0x10>; - #thermal-sensor-cells = <0>; + thermal: thermal@2c0 { + compatible = "brcm,ns-thermal"; + reg = <0x2c0 0x10>; + #thermal-sensor-cells = <0>; + }; + }; }; srab: srab@18007000 { |