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authorDavid Lechner <david@lechnology.com>2019-05-27 10:22:57 +0200
committerSekhar Nori <nsekhar@ti.com>2019-06-14 18:22:37 +0530
commitfdf1b274610428dd4e5d296cc4c414f0c97ecc33 (patch)
tree926e9498047d5bd6f73b432d69aa5b334982c0c6 /arch/arm/boot/dts/da850-lcdk.dts
parent3975205ac334373efe65641482ef42ff3fec80af (diff)
ARM: dts: da850-lcdk: enable cpufreq
Add a fixed regulator for the da850-lcdk board along with board-specific CPU configuration. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/da850-lcdk.dts')
-rw-r--r--arch/arm/boot/dts/da850-lcdk.dts36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 26f453dc8370..b36d5e36bcf1 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -155,12 +155,48 @@
};
};
};
+
+ cvdd: regulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "cvdd";
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
};
&ref_clk {
clock-frequency = <24000000>;
};
+&cpu {
+ cpu-supply = <&cvdd>;
+};
+
+/*
+ * LCDK has a fixed CVDD of 1.3V, so only operating points >= 300MHz are
+ * valid. Unfortunately due to a problem with the DA8XX OHCI controller, we
+ * can't enable more than one OPP by default, since the controller sometimes
+ * becomes unresponsive after a transition. Fix the frequency at 456 MHz.
+ */
+
+&opp_100 {
+ status = "disabled";
+};
+
+&opp_200 {
+ status = "disabled";
+};
+
+&opp_300 {
+ status = "disabled";
+};
+
+&opp_456 {
+ status = "okay";
+};
+
&pmx_core {
status = "okay";