Merge tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu into next/dt

Pull "mvebu dt changes for v4.1 (part #1)" from Gregory CLEMENT:

- fix SDHCI nodes on Armada 38x
- add Linksys WRT1900AC (Mamba) support (including the Ethernet switch)
- add several fixes and improvement for dove
- enable GPIO fan alarm support for 2Big Network v2
- add several fixes about unit address
- add support for Armada 39x SoC and board

* tag 'mvebu-dt-4.1' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: add Device Tree files for Armada 39x SoC and board
  ARM: mvebu: fix unit address of MPIC nodes
  ARM: mvebu: use stdout-path in all armada-*.dts
  ARM: mvebu: add serial port aliases on Armada 370/375/38x/XP
  ARM: mvebu: remove aliases for Ethernet devices on Armada 370/375/38x/XP
  ARM: mvebu: add UART labels to Armada 375
  ARM: mvebu: add missing UART labels on Armada 38x
  ARM: mvebu: fix usb@ unit address on Armada 38x to match register address
  ARM: mvebu: a385-db-ap: Enable the NAND
  ARM: ARMADA XP: WRT1900AC: Add support for the Ethernet switch
  ARM: Kirkwood: enable GPIO fan alarm support for 2Big Network v2
  ARM: mvebu: Fix MPIC unit address
  ARM: dts: dove: Add some more common pinctrl settings
  ARM: dts: dove: Add node labels for PCIe ports 0 and 1
  ARM: dts: dove: Always include gpio and interrupt-controller headers
  ARM: dts: dove: Fix uart[23] reg property
  ARM: mvebu: add Linksys WRT1900AC (Mamba) support
  ARM: mvebu: Add Device Tree description of SDHCI for Armada 388 RD
  ARM: mvebu: Update the SDHCI node on Armada 38x
  ARM: mvebu: Use macros for interrupt flags on Armada 38x sdhci node

1 files changed, 59 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index a5441d5482a6..9ad829523a13 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -1,5 +1,8 @@
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
 
 / {
@@ -61,7 +64,7 @@
 				  0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0   /* Port 1.0 Mem */
 				  0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */
 
-			pcie-port@0 {
+			pcie0: pcie-port@0 {
 				device_type = "pci";
 				status = "disabled";
 				assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
@@ -79,7 +82,7 @@
 				interrupt-map = <0 0 0 0 &intc 16>;
 			};
 
-			pcie-port@1 {
+			pcie1: pcie-port@1 {
 				device_type = "pci";
 				status = "disabled";
 				assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
@@ -154,7 +157,7 @@
 
 			uart2: serial@12200 {
 				compatible = "ns16550a";
-				reg = <0x12000 0x100>;
+				reg = <0x12200 0x100>;
 				reg-shift = <2>;
 				interrupts = <9>;
 				clocks = <&core_clk 0>;
@@ -163,7 +166,7 @@
 
 			uart3: serial@12300 {
 				compatible = "ns16550a";
-				reg = <0x12100 0x100>;
+				reg = <0x12300 0x100>;
 				reg-shift = <2>;
 				interrupts = <10>;
 				clocks = <&core_clk 0>;
@@ -448,6 +451,11 @@
 					marvell,function = "gpio";
 				};
 
+				pmx_pcie1_clkreq: pmx-pcie1-clkreq {
+					marvell,pins = "mpp9";
+					marvell,function = "pex1";
+				};
+
 				pmx_gpio_10: pmx-gpio-10 {
 					marvell,pins = "mpp10";
 					marvell,function = "gpio";
@@ -458,6 +466,11 @@
 					marvell,function = "gpio";
 				};
 
+				pmx_pcie0_clkreq: pmx-pcie0-clkreq {
+					marvell,pins = "mpp11";
+					marvell,function = "pex0";
+				};
+
 				pmx_gpio_12: pmx-gpio-12 {
 					marvell,pins = "mpp12";
 					marvell,function = "gpio";
@@ -563,6 +576,18 @@
 					marvell,function = "gpio";
 				};
 
+				pmx_spi1_4_7: pmx-spi1-4-7 {
+					marvell,pins = "mpp4", "mpp5",
+						"mpp6", "mpp7";
+					marvell,function = "spi1";
+				};
+
+				pmx_spi1_20_23: pmx-spi1-20-23 {
+					marvell,pins = "mpp20", "mpp21",
+						"mpp22", "mpp23";
+					marvell,function = "spi1";
+				};
+
 				pmx_uart1: pmx-uart1 {
 					marvell,pins = "mpp_uart1";
 					marvell,function = "uart1";
@@ -582,6 +607,36 @@
 					marvell,pins = "mpp_nand";
 					marvell,function = "gpo";
 				};
+
+				pmx_i2c1: pmx-i2c1 {
+					marvell,pins = "mpp17", "mpp19";
+					marvell,function = "twsi";
+				};
+
+				pmx_i2c2: pmx-i2c2 {
+					marvell,pins = "mpp_audio1";
+					marvell,function = "twsi";
+				};
+
+				pmx_ssp_i2c2: pmx-ssp-i2c2 {
+					marvell,pins = "mpp_audio1";
+					marvell,function = "ssp/twsi";
+				};
+
+				pmx_i2cmux_0: pmx-i2cmux-0 {
+					marvell,pins = "twsi";
+					marvell,function = "twsi-opt1";
+				};
+
+				pmx_i2cmux_1: pmx-i2cmux-1 {
+					marvell,pins = "twsi";
+					marvell,function = "twsi-opt2";
+				};
+
+				pmx_i2cmux_2: pmx-i2cmux-2 {
+					marvell,pins = "twsi";
+					marvell,function = "twsi-opt3";
+				};
 			};
 
 			core_clk: core-clocks@d0214 {