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authorVignesh R <vigneshr@ti.com>2016-02-25 16:36:36 -0600
committerTony Lindgren <tony@atomide.com>2016-02-29 15:21:28 -0800
commit5fcc673067a2b577d37f2c5c5439dbb177f7107e (patch)
treed6a6238590ce64db751ef2bed259ce9412084e9b /arch/arm/boot/dts/dra7.dtsi
parentc60f9e29805eb5f27bc7fad088f3becabf388a1c (diff)
ARM: dts: DRA7: Add dt nodes for PWMSS
Add PWMSS device tree nodes for DRA7 SoC family and add documentation for dt bindings. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi64
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 098b4dd14b01..6a4572a5e35f 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1563,6 +1563,70 @@
clock-names = "fck", "sys_clk";
};
};
+
+ epwmss0: epwmss@4843e000 {
+ compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+ reg = <0x4843e000 0x30>;
+ ti,hwmods = "epwmss0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x4843e100 0x4843e100 0x80 /* ECAP */
+ 0x4843e180 0x4843e180 0x80 /* EQEP */
+ 0x4843e200 0x4843e200 0x80>;/* EHRPWM */
+
+ ehrpwm0: ehrpwm@4843e200 {
+ compatible = "ti,dra7xx-ehrpwm",
+ "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x4843e200 0x80>;
+ ti,hwmods = "ehrpwm0";
+ status = "disabled";
+ };
+ };
+
+ epwmss1: epwmss@48440000 {
+ compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+ reg = <0x48440000 0x30>;
+ ti,hwmods = "epwmss1";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ ranges = <0x48440100 0x48440100 0x80 /* ECAP */
+ 0x48440180 0x48440180 0x80 /* EQEP */
+ 0x48440200 0x48440200 0x80>; /* EHRPWM */
+
+ ehrpwm1: ehrpwm@48440200 {
+ compatible = "ti,dra7xx-ehrpwm",
+ "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48440200 0x80>;
+ ti,hwmods = "ehrpwm1";
+ status = "disabled";
+ };
+ };
+
+ epwmss2: epwmss@48442000 {
+ compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss";
+ reg = <0x48442000 0x30>;
+ ti,hwmods = "epwmss2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+
+ ranges = <0x48442100 0x48442100 0x80 /* ECAP */
+ 0x48442180 0x48442180 0x80 /* EQEP */
+ 0x48442200 0x48442200 0x80>; /* EHRPWM */
+
+ ehrpwm2: ehrpwm@48442200 {
+ compatible = "ti,dra7xx-ehrpwm",
+ "ti,am33xx-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48442200 0x80>;
+ ti,hwmods = "ehrpwm2";
+ status = "disabled";
+ };
+ };
};
thermal_zones: thermal-zones {