summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/dra74x.dtsi
diff options
context:
space:
mode:
authorDave Gerlach <d-gerlach@ti.com>2016-05-18 18:36:33 -0500
committerTony Lindgren <tony@atomide.com>2016-06-10 04:58:07 -0700
commitf80bc97fd0a9711ef11bdb3e63c2c01115a82c47 (patch)
tree2a2c5c88a46e105be007f7b086ab01b5d14273ae /arch/arm/boot/dts/dra74x.dtsi
parentb82ffb337b69947bf82d936827fe5c6e2ad6abdd (diff)
ARM: dts: dra7: Move to operating-points-v2 table
Add an operating-points-v2 table with all OPPs available for all silicon revisions along with necessary data for use by ti-opp driver to selectively enable the appropriate OPPs at runtime and handle voltage transitions As we now need to define voltage ranges for each OPP, we define the minimum and maximum voltage to match the ranges possible for AVS class0 voltage as defined by the DRA7/AM57 Data Manual, with the exception of using a range for OPP_OD based on historical data to ensure that SoCs from older lots still continue to boot, even though more optimal voltages are now the standard. Once an AVS Class0 driver is in place it will be possible for these OPP voltages to be adjusted to any voltage within the provided range. Information from SPRS953, Revised December 2015. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra74x.dtsi')
-rw-r--r--arch/arm/boot/dts/dra74x.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 0c31db3a8919..0a8a5eee5dd0 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -17,6 +17,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
};