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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-04-30 14:19:00 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-05-04 10:23:27 +0200
commitd414b7a3f370d640cff544a3aa3a41abf34fd5d6 (patch)
tree98a4115a9541e46a10cf49ae5e62f86d657cd45e /arch/arm/boot/dts/exynos5250.dtsi
parentd0b05d3820fa1b688b192699017f95f8a565523b (diff)
ARM: dts: exynos: drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220430121902.59895-8-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi8
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index df80ddfada2d..4708dcd575a7 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -700,8 +700,6 @@
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -711,8 +709,6 @@
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -722,8 +718,6 @@
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -733,8 +727,6 @@
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
};
gsc_0: gsc@13e00000 {