Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "Lots of changes as usual, so I'm trying to be brief here. Most of the
  new hardware support has the respective driver changes merged through
  other trees or has had it available for a while, so this is where
  things come together.

  We get a DT descriptions for a couple of new SoCs, all of them
  variants of other chips we already support, and usually coming with a
  new evaluation board:

   - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
   - Qualcomm MDM9615 LTE baseband
   - NXP imx6ull, the latest and smallest i.MX6 application processor variant
   - Renesas RZ/G (r8a7743 and r8a7745) application processors
   - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
   - Rockchip rk1108 single-core application processor
   - ST stm32f746 Cortex-M7 based microcontroller
   - TI DRA71x automotive processors

  These are commercially available consumer platforms we now support:

   - Motorola Droid 4 (xt894) mobile phone
   - Rikomagic MK808 Android TV stick based on Rockchips rx3066
   - Cloud Engines PogoPlug v3 based on OX820
   - Various Broadcom based wireless devices:
      - Netgear R8500 router
      - Tenda AC9 router
      - TP-LINK Archer C9 V1
      - Luxul XAP-1510 Access point
   - Turris Omnia open hardware router based on Armada 385

  And a couple of new boards targeted at developers, makers or
  industrial integration:

   - Macnica Sodia development platform for Altera socfpga (Cyclone V)
   - MicroZed board based on Xilinx Zynq FPGA platforms
   - TOPEET itop/elite based on exynos4412
   - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
   - NextThing CHIP Pro gadget
   - NanoPi M1 development board
   - AM571x-IDK industrial board based on TI AM5718
   - i.MX6SX UDOO Neo
   - Boundary Devices Nitrogen6_SOM2 (i.MX6)
   - Engicam i.CoreM6
   - Grinn i.MX6UL liteSOM/liteBoard
   - Toradex Colibri iMX6 module

  Other changes:

   - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
     mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
     mvebu, allwinner, broadcom, exynos, zynq

   - Continued fixes for W=1 dtc warnings

   - The old STiH415/416 SoC support gets removed, these never made it
     into products and have served their purpose in the kernel as a
     template for teh newer chips from ST

   - The exynos4415 dtsi file is removed as nothing uses it.

   - Intel PXA25x can now be booted using devicetree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
  arm: dts: zynq: Add MicroZed board support
  ARM: dts: da850: enable high speed for mmc
  ARM: dts: da850: Add node for pullup/pulldown pinconf
  ARM: dts: da850: enable memctrl and mstpri nodes per board
  ARM: dts: da850-lcdk: Add ethernet0 alias to DT
  ARM: dts: artpec: add pcie support
  ARM: dts: add support for Turris Omnia
  devicetree: Add vendor prefix for CZ.NIC
  ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
  ARM: dts: berlin2q-marvell-dmp: fix regulators' name
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ...

1 files changed, 27 insertions, 16 deletions

diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index a86a4898d077..5818718618b1 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -10,6 +10,8 @@
 */
 
 #include <dt-bindings/clock/exynos5260-clk.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
 	compatible = "samsung,exynos5260", "samsung,exynos5";
@@ -168,7 +170,8 @@
 				<0x10482000 0x1000>,
 				<0x10484000 0x2000>,
 				<0x10486000 0x2000>;
-			interrupts = <1 9 0xf04>;
+			interrupts = <GIC_PPI 9
+					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
 		chipid: chipid@10000000 {
@@ -181,10 +184,18 @@
 			reg = <0x100B0000 0x1000>;
 			clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
 			clock-names = "fin_pll", "mct";
-			interrupts = <0 104 0>, <0 105 0>, <0 106 0>,
-					<0 107 0>, <0 122 0>, <0 123 0>,
-					<0 124 0>, <0 125 0>, <0 126 0>,
-					<0 127 0>, <0 128 0>, <0 129 0>;
+			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		cci: cci@10F00000 {
@@ -210,25 +221,25 @@
 		pinctrl_0: pinctrl@11600000 {
 			compatible = "samsung,exynos5260-pinctrl";
 			reg = <0x11600000 0x1000>;
-			interrupts = <0 79 0>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 
 			wakeup-interrupt-controller {
 				compatible = "samsung,exynos4210-wakeup-eint";
 				interrupt-parent = <&gic>;
-				interrupts = <0 32 0>;
+				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 			};
 		};
 
 		pinctrl_1: pinctrl@12290000 {
 			compatible = "samsung,exynos5260-pinctrl";
 			reg = <0x12290000 0x1000>;
-			interrupts = <0 157 0>;
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		pinctrl_2: pinctrl@128B0000 {
 			compatible = "samsung,exynos5260-pinctrl";
 			reg = <0x128B0000 0x1000>;
-			interrupts = <0 243 0>;
+			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		pmu_system_controller: system-controller@10D50000 {
@@ -239,7 +250,7 @@
 		uart0: serial@12C00000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C00000 0x100>;
-			interrupts = <0 146 0>;
+			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>;
 			clock-names = "uart", "clk_uart_baud0";
 			status = "disabled";
@@ -248,7 +259,7 @@
 		uart1: serial@12C10000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C10000 0x100>;
-			interrupts = <0 147 0>;
+			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>;
 			clock-names = "uart", "clk_uart_baud0";
 			status = "disabled";
@@ -257,7 +268,7 @@
 		uart2: serial@12C20000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12C20000 0x100>;
-			interrupts = <0 148 0>;
+			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>;
 			clock-names = "uart", "clk_uart_baud0";
 			status = "disabled";
@@ -266,7 +277,7 @@
 		uart3: serial@12860000 {
 			compatible = "samsung,exynos4210-uart";
 			reg = <0x12860000 0x100>;
-			interrupts = <0 145 0>;
+			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clock_aud AUD_CLK_AUD_UART>, <&clock_aud AUD_SCLK_AUD_UART>;
 			clock-names = "uart", "clk_uart_baud0";
 			status = "disabled";
@@ -275,7 +286,7 @@
 		mmc_0: mmc@12140000 {
 			compatible = "samsung,exynos5250-dw-mshc";
 			reg = <0x12140000 0x2000>;
-			interrupts = <0 156 0>;
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>;
@@ -287,7 +298,7 @@
 		mmc_1: mmc@12150000 {
 			compatible = "samsung,exynos5250-dw-mshc";
 			reg = <0x12150000 0x2000>;
-			interrupts = <0 158 0>;
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>;
@@ -299,7 +310,7 @@
 		mmc_2: mmc@12160000 {
 			compatible = "samsung,exynos5250-dw-mshc";
 			reg = <0x12160000 0x2000>;
-			interrupts = <0 159 0>;
+			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>;