ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>

1 files changed, 0 insertions, 593 deletions

diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
deleted file mode 100644
index e140307be2e7..000000000000
--- a/arch/arm/boot/dts/imx27.dtsi
+++ /dev/null
@@ -1,593 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-//
-// Copyright 2012 Sascha Hauer, Pengutronix
-
-#include "imx27-pinfunc.h"
-
-#include <dt-bindings/clock/imx27-clock.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-	/*
-	 * The decompressor and also some bootloaders rely on a
-	 * pre-existing /chosen node to be available to insert the
-	 * command line and merge other ATAGS info.
-	 */
-	chosen {};
-
-	aliases {
-		ethernet0 = &fec;
-		gpio0 = &gpio1;
-		gpio1 = &gpio2;
-		gpio2 = &gpio3;
-		gpio3 = &gpio4;
-		gpio4 = &gpio5;
-		gpio5 = &gpio6;
-		i2c0 = &i2c1;
-		i2c1 = &i2c2;
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-		serial4 = &uart5;
-		serial5 = &uart6;
-		spi0 = &cspi1;
-		spi1 = &cspi2;
-		spi2 = &cspi3;
-	};
-
-	aitc: aitc-interrupt-controller@10040000 {
-		compatible = "fsl,imx27-aitc", "fsl,avic";
-		interrupt-controller;
-		#interrupt-cells = <1>;
-		reg = <0x10040000 0x1000>;
-	};
-
-	clocks {
-		clk_osc26m: osc26m {
-			compatible = "fsl,imx-osc26m", "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <26000000>;
-		};
-	};
-
-	cpus {
-		#size-cells = <0>;
-		#address-cells = <1>;
-
-		cpu: cpu@0 {
-			device_type = "cpu";
-			reg = <0>;
-			compatible = "arm,arm926ej-s";
-			operating-points = <
-				/* kHz uV */
-				266000 1300000
-				399000 1450000
-			>;
-			clock-latency = <62500>;
-			clocks = <&clks IMX27_CLK_CPU_DIV>;
-			voltage-tolerance = <5>;
-		};
-	};
-
-	soc: soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&aitc>;
-		ranges;
-
-		aipi1: aipi@10000000 { /* AIPI1 */
-			compatible = "fsl,aipi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x10000000 0x20000>;
-			ranges;
-
-			dma: dma@10001000 {
-				compatible = "fsl,imx27-dma";
-				reg = <0x10001000 0x1000>;
-				interrupts = <32>;
-				clocks = <&clks IMX27_CLK_DMA_IPG_GATE>,
-					 <&clks IMX27_CLK_DMA_AHB_GATE>;
-				clock-names = "ipg", "ahb";
-				#dma-cells = <1>;
-				dma-channels = <16>;
-			};
-
-			wdog: watchdog@10002000 {
-				compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
-				reg = <0x10002000 0x1000>;
-				interrupts = <27>;
-				clocks = <&clks IMX27_CLK_WDOG_IPG_GATE>;
-			};
-
-			gpt1: timer@10003000 {
-				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
-				reg = <0x10003000 0x1000>;
-				interrupts = <26>;
-				clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-
-			gpt2: timer@10004000 {
-				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
-				reg = <0x10004000 0x1000>;
-				interrupts = <25>;
-				clocks = <&clks IMX27_CLK_GPT2_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-
-			gpt3: timer@10005000 {
-				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
-				reg = <0x10005000 0x1000>;
-				interrupts = <24>;
-				clocks = <&clks IMX27_CLK_GPT3_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-
-			pwm: pwm@10006000 {
-				#pwm-cells = <3>;
-				compatible = "fsl,imx27-pwm";
-				reg = <0x10006000 0x1000>;
-				interrupts = <23>;
-				clocks = <&clks IMX27_CLK_PWM_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-
-			rtc: rtc@10007000 {
-				compatible = "fsl,imx21-rtc";
-				reg = <0x10007000 0x1000>;
-				interrupts = <22>;
-				clocks = <&clks IMX27_CLK_CKIL>,
-					 <&clks IMX27_CLK_RTC_IPG_GATE>;
-				clock-names = "ref", "ipg";
-			};
-
-			kpp: kpp@10008000 {
-				compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
-				reg = <0x10008000 0x1000>;
-				interrupts = <21>;
-				clocks = <&clks IMX27_CLK_KPP_IPG_GATE>;
-				status = "disabled";
-			};
-
-			owire: owire@10009000 {
-				compatible = "fsl,imx27-owire", "fsl,imx21-owire";
-				reg = <0x10009000 0x1000>;
-				clocks = <&clks IMX27_CLK_OWIRE_IPG_GATE>;
-				status = "disabled";
-			};
-
-			uart1: serial@1000a000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000a000 0x1000>;
-				interrupts = <20>;
-				clocks = <&clks IMX27_CLK_UART1_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			uart2: serial@1000b000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000b000 0x1000>;
-				interrupts = <19>;
-				clocks = <&clks IMX27_CLK_UART2_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			uart3: serial@1000c000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000c000 0x1000>;
-				interrupts = <18>;
-				clocks = <&clks IMX27_CLK_UART3_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			uart4: serial@1000d000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000d000 0x1000>;
-				interrupts = <17>;
-				clocks = <&clks IMX27_CLK_UART4_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			cspi1: spi@1000e000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-cspi";
-				reg = <0x1000e000 0x1000>;
-				interrupts = <16>;
-				clocks = <&clks IMX27_CLK_CSPI1_IPG_GATE>,
-					 <&clks IMX27_CLK_PER2_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			cspi2: spi@1000f000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-cspi";
-				reg = <0x1000f000 0x1000>;
-				interrupts = <15>;
-				clocks = <&clks IMX27_CLK_CSPI2_IPG_GATE>,
-					 <&clks IMX27_CLK_PER2_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			ssi1: ssi@10010000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
-				reg = <0x10010000 0x1000>;
-				interrupts = <14>;
-				clocks = <&clks IMX27_CLK_SSI1_IPG_GATE>;
-				dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
-				dma-names = "rx0", "tx0", "rx1", "tx1";
-				fsl,fifo-depth = <8>;
-				status = "disabled";
-			};
-
-			ssi2: ssi@10011000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
-				reg = <0x10011000 0x1000>;
-				interrupts = <13>;
-				clocks = <&clks IMX27_CLK_SSI2_IPG_GATE>;
-				dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
-				dma-names = "rx0", "tx0", "rx1", "tx1";
-				fsl,fifo-depth = <8>;
-				status = "disabled";
-			};
-
-			i2c1: i2c@10012000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
-				reg = <0x10012000 0x1000>;
-				interrupts = <12>;
-				clocks = <&clks IMX27_CLK_I2C1_IPG_GATE>;
-				status = "disabled";
-			};
-
-			sdhci1: mmc@10013000 {
-				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
-				reg = <0x10013000 0x1000>;
-				interrupts = <11>;
-				clocks = <&clks IMX27_CLK_SDHC1_IPG_GATE>,
-					 <&clks IMX27_CLK_PER2_GATE>;
-				clock-names = "ipg", "per";
-				dmas = <&dma 7>;
-				dma-names = "rx-tx";
-				status = "disabled";
-			};
-
-			sdhci2: mmc@10014000 {
-				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
-				reg = <0x10014000 0x1000>;
-				interrupts = <10>;
-				clocks = <&clks IMX27_CLK_SDHC2_IPG_GATE>,
-					 <&clks IMX27_CLK_PER2_GATE>;
-				clock-names = "ipg", "per";
-				dmas = <&dma 6>;
-				dma-names = "rx-tx";
-				status = "disabled";
-			};
-
-			iomuxc: iomuxc@10015000 {
-				compatible = "fsl,imx27-iomuxc";
-				reg = <0x10015000 0x600>;
-				#address-cells = <1>;
-				#size-cells = <1>;
-				ranges;
-
-				gpio1: gpio@10015000 {
-					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-					reg = <0x10015000 0x100>;
-					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
-					interrupts = <8>;
-					gpio-controller;
-					#gpio-cells = <2>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-				};
-
-				gpio2: gpio@10015100 {
-					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-					reg = <0x10015100 0x100>;
-					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
-					interrupts = <8>;
-					gpio-controller;
-					#gpio-cells = <2>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-				};
-
-				gpio3: gpio@10015200 {
-					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-					reg = <0x10015200 0x100>;
-					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
-					interrupts = <8>;
-					gpio-controller;
-					#gpio-cells = <2>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-				};
-
-				gpio4: gpio@10015300 {
-					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-					reg = <0x10015300 0x100>;
-					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
-					interrupts = <8>;
-					gpio-controller;
-					#gpio-cells = <2>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-				};
-
-				gpio5: gpio@10015400 {
-					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-					reg = <0x10015400 0x100>;
-					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
-					interrupts = <8>;
-					gpio-controller;
-					#gpio-cells = <2>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-				};
-
-				gpio6: gpio@10015500 {
-					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-					reg = <0x10015500 0x100>;
-					clocks = <&clks IMX27_CLK_GPIO_IPG_GATE>;
-					interrupts = <8>;
-					gpio-controller;
-					#gpio-cells = <2>;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-				};
-			};
-
-			audmux: audmux@10016000 {
-				compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
-				reg = <0x10016000 0x1000>;
-				clocks = <&clks IMX27_CLK_DUMMY>;
-				clock-names = "audmux";
-				status = "disabled";
-			};
-
-			cspi3: spi@10017000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-cspi";
-				reg = <0x10017000 0x1000>;
-				interrupts = <6>;
-				clocks = <&clks IMX27_CLK_CSPI3_IPG_GATE>,
-					 <&clks IMX27_CLK_PER2_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			gpt4: timer@10019000 {
-				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
-				reg = <0x10019000 0x1000>;
-				interrupts = <4>;
-				clocks = <&clks IMX27_CLK_GPT4_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-
-			gpt5: timer@1001a000 {
-				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
-				reg = <0x1001a000 0x1000>;
-				interrupts = <3>;
-				clocks = <&clks IMX27_CLK_GPT5_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-
-			uart5: serial@1001b000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1001b000 0x1000>;
-				interrupts = <49>;
-				clocks = <&clks IMX27_CLK_UART5_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			uart6: serial@1001c000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1001c000 0x1000>;
-				interrupts = <48>;
-				clocks = <&clks IMX27_CLK_UART6_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
-
-			i2c2: i2c@1001d000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
-				reg = <0x1001d000 0x1000>;
-				interrupts = <1>;
-				clocks = <&clks IMX27_CLK_I2C2_IPG_GATE>;
-				status = "disabled";
-			};
-
-			sdhci3: mmc@1001e000 {
-				compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
-				reg = <0x1001e000 0x1000>;
-				interrupts = <9>;
-				clocks = <&clks IMX27_CLK_SDHC3_IPG_GATE>,
-					 <&clks IMX27_CLK_PER2_GATE>;
-				clock-names = "ipg", "per";
-				dmas = <&dma 36>;
-				dma-names = "rx-tx";
-				status = "disabled";
-			};
-
-			gpt6: timer@1001f000 {
-				compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
-				reg = <0x1001f000 0x1000>;
-				interrupts = <2>;
-				clocks = <&clks IMX27_CLK_GPT6_IPG_GATE>,
-					 <&clks IMX27_CLK_PER1_GATE>;
-				clock-names = "ipg", "per";
-			};
-		};
-
-		aipi2: aipi@10020000 { /* AIPI2 */
-			compatible = "fsl,aipi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x10020000 0x20000>;
-			ranges;
-
-			fb: fb@10021000 {
-				compatible = "fsl,imx27-fb", "fsl,imx21-fb";
-				interrupts = <61>;
-				reg = <0x10021000 0x1000>;
-				clocks = <&clks IMX27_CLK_LCDC_IPG_GATE>,
-					 <&clks IMX27_CLK_LCDC_AHB_GATE>,
-					 <&clks IMX27_CLK_PER3_GATE>;
-				clock-names = "ipg", "ahb", "per";
-				status = "disabled";
-			};
-
-			coda: coda@10023000 {
-				compatible = "fsl,imx27-vpu", "cnm,codadx6";
-				reg = <0x10023000 0x0200>;
-				interrupts = <53>;
-				clocks = <&clks IMX27_CLK_VPU_BAUD_GATE>,
-					 <&clks IMX27_CLK_VPU_AHB_GATE>;
-				clock-names = "per", "ahb";
-				iram = <&iram>;
-			};
-
-			usbotg: usb@10024000 {
-				compatible = "fsl,imx27-usb";
-				reg = <0x10024000 0x200>;
-				interrupts = <56>;
-				clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
-					<&clks IMX27_CLK_USB_AHB_GATE>,
-					<&clks IMX27_CLK_USB_DIV>;
-				clock-names = "ipg", "ahb", "per";
-				fsl,usbmisc = <&usbmisc 0>;
-				status = "disabled";
-			};
-
-			usbh1: usb@10024200 {
-				compatible = "fsl,imx27-usb";
-				reg = <0x10024200 0x200>;
-				interrupts = <54>;
-				clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
-					<&clks IMX27_CLK_USB_AHB_GATE>,
-					<&clks IMX27_CLK_USB_DIV>;
-				clock-names = "ipg", "ahb", "per";
-				fsl,usbmisc = <&usbmisc 1>;
-				dr_mode = "host";
-				status = "disabled";
-			};
-
-			usbh2: usb@10024400 {
-				compatible = "fsl,imx27-usb";
-				reg = <0x10024400 0x200>;
-				interrupts = <55>;
-				clocks = <&clks IMX27_CLK_USB_IPG_GATE>,
-					<&clks IMX27_CLK_USB_AHB_GATE>,
-					<&clks IMX27_CLK_USB_DIV>;
-				clock-names = "ipg", "ahb", "per";
-				fsl,usbmisc = <&usbmisc 2>;
-				dr_mode = "host";
-				status = "disabled";
-			};
-
-			usbmisc: usbmisc@10024600 {
-				#index-cells = <1>;
-				compatible = "fsl,imx27-usbmisc";
-				reg = <0x10024600 0x200>;
-			};
-
-			sahara2: crypto@10025000 {
-				compatible = "fsl,imx27-sahara";
-				reg = <0x10025000 0x1000>;
-				interrupts = <59>;
-				clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>,
-					 <&clks IMX27_CLK_SAHARA_AHB_GATE>;
-				clock-names = "ipg", "ahb";
-			};
-
-			clks: ccm@10027000{
-				compatible = "fsl,imx27-ccm";
-				reg = <0x10027000 0x1000>;
-				#clock-cells = <1>;
-			};
-
-			iim: efuse@10028000 {
-				compatible = "fsl,imx27-iim";
-				reg = <0x10028000 0x1000>;
-				interrupts = <62>;
-				clocks = <&clks IMX27_CLK_IIM_IPG_GATE>;
-			};
-
-			fec: ethernet@1002b000 {
-				compatible = "fsl,imx27-fec";
-				reg = <0x1002b000 0x1000>;
-				interrupts = <50>;
-				clocks = <&clks IMX27_CLK_FEC_IPG_GATE>,
-					 <&clks IMX27_CLK_FEC_AHB_GATE>;
-				clock-names = "ipg", "ahb";
-				status = "disabled";
-			};
-		};
-
-		nfc: nand-controller@d8000000 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "fsl,imx27-nand";
-			reg = <0xd8000000 0x1000>;
-			interrupts = <29>;
-			clocks = <&clks IMX27_CLK_NFC_BAUD_GATE>;
-			status = "disabled";
-		};
-
-		weim: weim@d8002000 {
-			#address-cells = <2>;
-			#size-cells = <1>;
-			compatible = "fsl,imx27-weim";
-			reg = <0xd8002000 0x1000>;
-			clocks = <&clks IMX27_CLK_EMI_AHB_GATE>;
-			ranges = <
-				0 0 0xc0000000 0x08000000
-				1 0 0xc8000000 0x08000000
-				2 0 0xd0000000 0x02000000
-				3 0 0xd2000000 0x02000000
-				4 0 0xd4000000 0x02000000
-				5 0 0xd6000000 0x02000000
-			>;
-			status = "disabled";
-		};
-
-		iram: sram@ffff4c00 {
-			compatible = "mmio-sram";
-			reg = <0xffff4c00 0xb400>;
-		};
-	};
-};