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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-05 15:29:04 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-05 15:29:04 -0700
commitf83ccb93585d1f472c30fa2bbb8b56c23dbdb506 (patch)
tree6548d92ff3f362f590bc96129df3e5cb5170ac02 /arch/arm/boot/dts/imx6dl.dtsi
parent930b440cd8256f3861bdb0a59d26efaadac7941a (diff)
parent50b4af414d414af9e4df6f64e613bb0ffe581055 (diff)
Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree changes from Arnd Bergmann: "A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only" * tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits) dts: stmmac: Document the clocks property in the stmmac base document dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. ARM: STi: stih41x: Add support for the FSM Serial Flash Controller ARM: STi: stih416: Add support for the FSM Serial Flash Controller ARM: tegra: fix Dalmore pinctrl configuration ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND ARM: dts: Build all keystone dt blobs ARM: dts: keystone: Fix control register range for clktsip ARM: dts: keystone: Fix domain register range for clkfftc1 ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap ARM: dts: bcm21664: Add device tree files. ARM: DT: bcm21664: Device tree bindings ARM: efm32: properly namespace i2c location property ARM: efm32: fix unit address part in USART2 device nodes' names ARM: mvebu: Enable NAND controller in Armada 385-DB ARM: mvebu: Add support for NAND controller in Armada 38x SoC ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs ...
Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi29
1 files changed, 25 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 25bbdd6f214b..5c5f574330f9 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -8,6 +8,7 @@
*
*/
+#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6dl-pinfunc.h"
#include "imx6qdl.dtsi"
@@ -21,6 +22,26 @@
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
+ operating-points = <
+ /* kHz uV */
+ 996000 1275000
+ 792000 1175000
+ 396000 1075000
+ >;
+ fsl,soc-operating-points = <
+ /* ARM kHz SOC-PU uV */
+ 996000 1175000
+ 792000 1175000
+ 396000 1175000
+ >;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clks 104>, <&clks 6>, <&clks 16>,
+ <&clks 17>, <&clks 170>;
+ clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+ arm-supply = <&reg_arm>;
+ pu-supply = <&reg_pu>;
+ soc-supply = <&reg_soc>;
};
cpu@1 {
@@ -45,17 +66,17 @@
pxp: pxp@020f0000 {
reg = <0x020f0000 0x4000>;
- interrupts = <0 98 0x04>;
+ interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
};
epdc: epdc@020f4000 {
reg = <0x020f4000 0x4000>;
- interrupts = <0 97 0x04>;
+ interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
};
lcdif: lcdif@020f8000 {
reg = <0x020f8000 0x4000>;
- interrupts = <0 39 0x04>;
+ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -65,7 +86,7 @@
#size-cells = <0>;
compatible = "fsl,imx1-i2c";
reg = <0x021f8000 0x4000>;
- interrupts = <0 35 0x04>;
+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};