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authorFabio Estevam <festevam@gmail.com>2020-08-19 18:04:24 -0300
committerShawn Guo <shawnguo@kernel.org>2020-08-30 09:37:20 +0800
commit2bfdd113d0ee1ea40fbb49f181fea352a7e5e1a7 (patch)
treef8ca59a746d02d138630720c740f8ba0c76b5f68 /arch/arm/boot/dts/imx6qdl-emcon.dtsi
parent0b784a7b1c53c3989e9ee2dfdd3fc9b6b14b5256 (diff)
ARM: dts: imx: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors") helped to detect the following SPI chipselect polarity mismatch on an imx6q-sabresd: [ 4.854337] m25p80@0 enforce active low on chipselect handle Prior to the above commit, the chipselect polarity passed via cs-gpios property was ignored and considered active-low. The reason for such mismatch is clearly explained in the comments inside drivers/gpio/gpiolib-of.c: * SPI children have active low chip selects * by default. This can be specified negatively * by just omitting "spi-cs-high" in the * device node, or actively by tagging on * GPIO_ACTIVE_LOW as flag in the device * tree. If the line is simultaneously * tagged as active low in the device tree * and has the "spi-cs-high" set, we get a * conflict and the "spi-cs-high" flag will * take precedence. To properly represent the SPI chipselect polarity, change it to active-low when the "spi-cs-high" property is absent. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-emcon.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-emcon.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/imx6qdl-emcon.dtsi
index 35e230f991f1..7228b894a763 100644
--- a/arch/arm/boot/dts/imx6qdl-emcon.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-emcon.dtsi
@@ -168,8 +168,8 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
- cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>,
- <&gpio2 27 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>,
+ <&gpio2 27 GPIO_ACTIVE_LOW>;
};
&ecspi4 {