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authorLeonard Crestez <leonard.crestez@nxp.com>2018-07-13 12:39:35 +0300
committerShawn Guo <shawnguo@kernel.org>2018-07-17 13:59:14 +0800
commit282706a681634d5e42cfa4dde909be931d4105a4 (patch)
treed3e733fae2ac961e4798447aad154afa9534580f /arch/arm/boot/dts/imx6sl.dtsi
parent0ad26ef12f570e79871b9be9528ce4bb4ed173d1 (diff)
ARM: dts: imx6sl: Add vivante gpu nodes
The imx6sl soc has gpu_2d and gpu_vg, no 3d support: etnaviv-gpu 2200000.gpu: model: GC320, revision: 5007 etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215 The IP blocks seem to be already supported. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index a6b5ca48298f..7a4f5dace902 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -949,5 +949,25 @@
status = "disabled";
};
};
+
+ gpu_2d: gpu@2200000 {
+ compatible = "vivante,gc";
+ reg = <0x02200000 0x4000>;
+ interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
+ <&clks IMX6SL_CLK_GPU2D_OVG>;
+ clock-names = "bus", "core";
+ power-domains = <&pd_pu>;
+ };
+
+ gpu_vg: gpu@2204000 {
+ compatible = "vivante,gc";
+ reg = <0x02204000 0x4000>;
+ interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6SL_CLK_MMDC_ROOT>,
+ <&clks IMX6SL_CLK_GPU2D_OVG>;
+ clock-names = "bus", "core";
+ power-domains = <&pd_pu>;
+ };
};
};