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authorKrzysztof Kozlowski <krzk@kernel.org>2020-06-26 10:06:31 +0200
committerShawn Guo <shawnguo@kernel.org>2020-07-13 19:48:53 +0800
commit69cc1502a87f5ed12e27dbe5fe2bfdd5540826c7 (patch)
tree0d0a6455fbc81d3539b07bb8eb58f903dc1e3605 /arch/arm/boot/dts/imx6sl.dtsi
parent954809fb53a92607eb5fb039e57dcc64363c696d (diff)
ARM: dts: imx: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like: l2-cache@a02000: $nodename:0: 'l2-cache@a02000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index e2d25328b579..eb8aeaa5ccab 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -126,7 +126,7 @@
interrupt-parent = <&intc>;
};
- L2: l2-cache@a02000 {
+ L2: cache-controller@a02000 {
compatible = "arm,pl310-cache";
reg = <0x00a02000 0x1000>;
interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;