diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2020-05-14 09:08:48 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-05-20 10:21:00 +0800 |
| commit | d7e1c2b081b08dbcd8717613407dd9f99f3b9c0f (patch) | |
| tree | 3cc4e946012eb5c4927fe5a05d3ce8d85c55f3d4 /arch/arm/boot/dts/imx6sl.dtsi | |
| parent | d8a6511d988a80dc7b1a83bcc213c6340def3590 (diff) | |
ARM: dts: imx6sl: Use nvmem interface to get fuse data
Although ocotp clock is always ON for i.MX6SL, OCOTP can be
accessed directly, but since i.MX6SL nvmem interface is supported,
and fsl,tempmon-data is deprecated, use it instead of getting fuse
data by reading ocotp directly, this makes all i.MX6 SoCs aligned.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 8230b45057a1..fcb84fe0e032 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -98,7 +98,8 @@ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gpc>; fsl,tempmon = <&anatop>; - fsl,tempmon-data = <&ocotp>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>; }; @@ -961,6 +962,14 @@ cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; + + tempmon_calib: calib@38 { + reg = <0x38 4>; + }; + + tempmon_temp_grade: temp-grade@20 { + reg = <0x20 4>; + }; }; audmux: audmux@21d8000 { |