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authorLinus Walleij <linus.walleij@linaro.org>2021-07-16 01:58:54 +0200
committerLinus Walleij <linus.walleij@linaro.org>2021-08-09 01:55:10 +0200
commitf2791ed73193f0f0a5b5fa41da1ee4dfefa64a68 (patch)
treedfc30ea167d7db9516b1192a5ac884d4467690e4 /arch/arm/boot/dts/intel-ixp42x.dtsi
parente647167967f84b95f64c9ff14dc161fbd645e5cc (diff)
ARM: dts: ixp4xx: Use the expansion bus
Replace the "simple-bus" simplification by the proper bus for IXP4xx memory or device expansion. Use chip-select addressing with two address cells on all the flashes mounted on the IXP4xx devices. This includes all flash chips. Change the unit-name from @50000000 to @c4000000 as the DTS validation screams. The registers for controlling the bus are at c4000000 but the actual memory windows and ranges are at 50000000. Well it is just syntax, we can live with it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/intel-ixp42x.dtsi')
-rw-r--r--arch/arm/boot/dts/intel-ixp42x.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/intel-ixp42x.dtsi b/arch/arm/boot/dts/intel-ixp42x.dtsi
index 5fa063ed396c..d0e0f8afb7c9 100644
--- a/arch/arm/boot/dts/intel-ixp42x.dtsi
+++ b/arch/arm/boot/dts/intel-ixp42x.dtsi
@@ -7,6 +7,11 @@
/ {
soc {
+ bus@c4000000 {
+ compatible = "intel,ixp42x-expansion-bus-controller", "syscon";
+ reg = <0xc4000000 0x28>;
+ };
+
pci@c0000000 {
compatible = "intel,ixp42x-pci";
};