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authorVladimir Zapolskiy <vz@mleia.com>2015-11-20 03:05:11 +0200
committerVladimir Zapolskiy <vz@mleia.com>2016-02-11 03:06:21 +0200
commitc82e688a333e41330372bd02478c15660618eb8b (patch)
tree908c5c5fed556499bcf02fc54a16ddd62ab9bc2b /arch/arm/boot/dts/lpc32xx.dtsi
parent865e90093af19db18dda7791345bc7b2eb814ade (diff)
arm: dts: lpc32xx: remove clock frequency property from UART device nodes
If clock-frequency property is given, then it substitutes calculation of supplying clock frequency from parent clock, this may break UART, if parent clock is given and managed by common clock framework. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'arch/arm/boot/dts/lpc32xx.dtsi')
-rw-r--r--arch/arm/boot/dts/lpc32xx.dtsi4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index db02eb007415..ba2be0f7d739 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -209,7 +209,6 @@
compatible = "nxp,lpc3220-uart";
reg = <0x40090000 0x1000>;
interrupts = <9 0>;
- clock-frequency = <13000000>;
reg-shift = <2>;
clocks = <&clk LPC32XX_CLK_UART5>;
status = "disabled";
@@ -219,7 +218,6 @@
compatible = "nxp,lpc3220-uart";
reg = <0x40080000 0x1000>;
interrupts = <7 0>;
- clock-frequency = <13000000>;
reg-shift = <2>;
clocks = <&clk LPC32XX_CLK_UART3>;
status = "disabled";
@@ -229,7 +227,6 @@
compatible = "nxp,lpc3220-uart";
reg = <0x40088000 0x1000>;
interrupts = <8 0>;
- clock-frequency = <13000000>;
reg-shift = <2>;
clocks = <&clk LPC32XX_CLK_UART4>;
status = "disabled";
@@ -239,7 +236,6 @@
compatible = "nxp,lpc3220-uart";
reg = <0x40098000 0x1000>;
interrupts = <10 0>;
- clock-frequency = <13000000>;
reg-shift = <2>;
clocks = <&clk LPC32XX_CLK_UART6>;
status = "disabled";