diff options
| author | Vladimir Zapolskiy <vz@mleia.com> | 2019-04-19 23:54:45 +0300 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2019-04-19 23:56:57 +0300 |
| commit | 4c546175dbe1b9bde68f547666a2c1f75d65b817 (patch) | |
| tree | 67eef4f6bc97492d16832eda16c139babca6498a /arch/arm/boot/dts/lpc32xx.dtsi | |
| parent | 903fa2ab79d832ef3dcf7424f0227799cbeda3da (diff) | |
ARM: dts: lpc32xx: disable MAC controller by default
NXP LPC3220 and LPC3230 SoCs do NOT contain a MAC controller, so,
since for now there is just one dtsi file for all variants of
NXP LPC32xx SoCs, it is reasonable to disable the controller
by default and enable it in device tree files of particular boards.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'arch/arm/boot/dts/lpc32xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/lpc32xx.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index aa1d9dd248fd..a0fedab579b4 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -153,6 +153,7 @@ reg = <0x31060000 0x1000>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk LPC32XX_CLK_MAC>; + status = "disabled"; }; emc: memory-controller@31080000 { |