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authorKrzysztof Kozlowski <krzk@kernel.org>2020-06-26 10:06:26 +0200
committerKevin Hilman <khilman@baylibre.com>2020-06-29 16:08:00 -0700
commit54320dcaa2522db3222c02d68b52cfed32a2e95b (patch)
tree6a2b005b119e60596a3f86581ee929bc027804e8 /arch/arm/boot/dts/meson.dtsi
parentb2037dafcf082cd24b88ae9283af628235df36e1 (diff)
ARM: dts: meson: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like: l2-cache-controller@c4200000: $nodename:0: 'l2-cache-controller@c4200000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20200626080626.4080-1-krzk@kernel.org
Diffstat (limited to 'arch/arm/boot/dts/meson.dtsi')
-rw-r--r--arch/arm/boot/dts/meson.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index ae89deaa8c9c..91129dc70d83 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -11,7 +11,7 @@
#size-cells = <1>;
interrupt-parent = <&gic>;
- L2: l2-cache-controller@c4200000 {
+ L2: cache-controller@c4200000 {
compatible = "arm,pl310-cache";
reg = <0xc4200000 0x1000>;
cache-unified;