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authorStefan Agner <stefan@agner.ch>2020-12-07 18:58:01 +0100
committerKevin Hilman <khilman@baylibre.com>2020-12-07 11:12:49 -0800
commit656ab1bdcd2b755dc161a9774201100d5bf74b8d (patch)
tree0a0d5e3f56d66136b9eb21cf4e6116e300ccf176 /arch/arm/boot/dts/meson8b-odroidc1.dts
parentc183c406c4321002fe85b345b51bc1a3a04b6d33 (diff)
ARM: dts: meson: fix PHY deassert timing requirements
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY registers. On similar boards with the same PHY this fixes an issue where Ethernet link would not come up when using ip link set down/up. Fixes: a2c6e82e5341 ("ARM: dts: meson: switch to the generic Ethernet PHY reset bindings") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> # on Odroid-C1+ Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/ff78772b306411e145769c46d4090554344db41e.1607363522.git.stefan@agner.ch
Diffstat (limited to 'arch/arm/boot/dts/meson8b-odroidc1.dts')
-rw-r--r--arch/arm/boot/dts/meson8b-odroidc1.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 0c26467de4d0..5963566dbcc9 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -224,7 +224,7 @@
reg = <0>;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;