diff options
| author | Lubomir Rintel <lkundrak@v3.sk> | 2019-12-20 07:53:13 +0100 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2020-01-06 09:33:27 -0800 |
| commit | 3240d5b872f24cc65f503246371a18551d730066 (patch) | |
| tree | 152077f048712366283db5338b14dd8567e2bf92 /arch/arm/boot/dts/mmp3.dtsi | |
| parent | f6f149604eefdcb515d80624f058b812d074dac0 (diff) | |
ARM: dts: mmp3: Add HSIC controllers
There are two on MMP3, along with the PHYs. The PHYs are made compatible
with the NOP transceiver, since there's no driver for the time being and
they're likely configured by the firmware.
Link: https://lore.kernel.org/r/20191220065314.237624-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/mmp3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/mmp3.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi index d9762de0ed34..36c50706e60e 100644 --- a/arch/arm/boot/dts/mmp3.dtsi +++ b/arch/arm/boot/dts/mmp3.dtsi @@ -201,6 +201,50 @@ status = "disabled"; }; + hsic_phy0: hsic-phy@f0001800 { + compatible = "marvell,mmp3-hsic-phy", + "usb-nop-xceiv", + reg = <0xf0001800 0x40>; + #phy-cells = <0>; + status = "disabled"; + }; + + hsic0: hsic@f0001000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xf0001000 0x200>; + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&soc_clocks MMP2_CLK_USBHSIC0>; + clock-names = "USBCLK"; + phys = <&hsic_phy0>; + phy-names = "usb"; + phy_type = "hsic"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + }; + + hsic_phy1: hsic-phy@f0002800 { + compatible = "marvell,mmp3-hsic-phy", + "usb-nop-xceiv", + reg = <0xf0002800 0x40>; + #phy-cells = <0>; + status = "disabled"; + }; + + hsic1: hsic@f0002000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xf0002000 0x200>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&soc_clocks MMP2_CLK_USBHSIC1>; + clock-names = "USBCLK"; + phys = <&hsic_phy1>; + phy-names = "usb"; + phy_type = "hsic"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + }; + mmc1: mmc@d4280000 { compatible = "mrvl,pxav3-mmc"; reg = <0xd4280000 0x120>; |