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authorLubomir Rintel <lkundrak@v3.sk>2021-01-21 04:41:30 +0100
committerArnd Bergmann <arnd@arndb.de>2021-02-02 18:14:01 +0100
commitfff342100771e30e0bc4c7ad68a9f237f549a2e4 (patch)
tree05a21c8a166cd40b276da822f73f8d714f866547 /arch/arm/boot/dts/mmp3.dtsi
parent0561cba77cafdbfa966eeb87163d2e874e3669e5 (diff)
ARM: dts: mmp3: Fix the CCIC interrupts
A copy & paste oversight from MMP2; camera interrupts are handled via a multiplexer on MMP3. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20210121034130.1381872-13-lkundrak@v3.sk' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/mmp3.dtsi')
-rw-r--r--arch/arm/boot/dts/mmp3.dtsi6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi
index 9f2b059f0900..a4fb9203ec1f 100644
--- a/arch/arm/boot/dts/mmp3.dtsi
+++ b/arch/arm/boot/dts/mmp3.dtsi
@@ -293,7 +293,8 @@
camera0: camera@d420a000 {
compatible = "marvell,mmp2-ccic";
reg = <0xd420a000 0x800>;
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <1>;
+ interrupt-parent = <&ci_mux>;
clocks = <&soc_clocks MMP2_CLK_CCIC0>;
clock-names = "axi";
power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
@@ -305,7 +306,8 @@
camera1: camera@d420a800 {
compatible = "marvell,mmp2-ccic";
reg = <0xd420a800 0x800>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <2>;
+ interrupt-parent = <&ci_mux>;
clocks = <&soc_clocks MMP2_CLK_CCIC1>;
clock-names = "axi";
power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;