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author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-10-20 12:46:56 +0300 |
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committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2021-10-21 13:45:16 +0200 |
commit | f3c0366411d6893360be21a7544595bf275bc9b2 (patch) | |
tree | 1270cc90e378dc5a9780a99c66af95ad02f82039 /arch/arm/boot/dts/omap3-gta04.dtsi | |
parent | 9430ff34385e285984711fccb2226771cbc675fb (diff) |
ARM: dts: at91: sama7g5-ek: use blocks 0 and 1 of TCB0 as cs and ce
Use blocks 0 and 1 of TCB0 for clocksource and clockevent functionality.
PIT64B is already enabled on SAMA7G5 targets for this but TCB0 will be
used as a fallback only in case PIT64B will fail to probe.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-4-claudiu.beznea@microchip.com
Diffstat (limited to 'arch/arm/boot/dts/omap3-gta04.dtsi')
0 files changed, 0 insertions, 0 deletions