diff options
| author | Tony Lindgren <tony@atomide.com> | 2017-08-30 08:19:46 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2017-09-19 10:28:40 -0700 |
| commit | 5750d6717b54ac9461912264710a3b60cda153bb (patch) | |
| tree | d87af10bab53e0f45290d0c4b0f561a830dba2ae /arch/arm/boot/dts/omap4.dtsi | |
| parent | 8be8576fcf2d90a8bc679bfb25a4121d0eebe0de (diff) | |
ARM: dts: Add missing wdt3 node for omap4
On omap4 we're missing the wdt3 node with it's related "ti,hwmods"
property that the SoC interconnect code needs.
Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index a3c4d3541e3d..70ecd840772d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -682,6 +682,14 @@ ti,hwmods = "wd_timer2"; }; + wdt3: wdt@40130000 { + compatible = "ti,omap4-wdt", "ti,omap3-wdt"; + reg = <0x40130000 0x80>, /* MPU private access */ + <0x49030000 0x80>; /* L3 Interconnect */ + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "wd_timer3"; + }; + mcpdm: mcpdm@40132000 { compatible = "ti,omap4-mcpdm"; reg = <0x40132000 0x7f>, /* MPU private access */ |