diff options
| author | Matthew McClintock <mmcclint@codeaurora.org> | 2016-03-23 17:05:07 -0500 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2016-04-19 21:42:16 -0500 |
| commit | 13ad4fd36a815f1f4fb96c7308ea104bafc6bdb9 (patch) | |
| tree | 37074b01fc93056e2723f76b6a06c2031554de27 /arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | |
| parent | 8196dd5e5c4c3b623a23e25060588a7129f0574e (diff) | |
qcom: ipq4019: add spi node to ipq4019 SoC and DK01 device tree
This will allow boards to enable the SPI bus
Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi index 223da1afd89a..21032a8c86f6 100644 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi @@ -48,6 +48,43 @@ bias-disable; }; }; + + spi_0_pins: spi_0_pinmux { + pinmux { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio54"; + }; + pinconf { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio54"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + spi_0: spi@78b5000 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + status = "ok"; + cs-gpios = <&tlmm 54 0>; + + mx25l25635e@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "mx25l25635e"; + spi-max-frequency = <24000000>; + }; }; serial@78af000 { |