diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2022-05-30 13:38:40 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-06-30 21:49:47 -0500 |
| commit | ae500b351ab0006d933d804a2b7507fe1e98cecc (patch) | |
| tree | ea156c6d4c4c6220a15e2a2c7768f8479dfa6666 /arch/arm/boot/dts/qcom-sdx55.dtsi | |
| parent | ab1489017aa7a9f02e24bee73cf9ec8079cd3909 (diff) | |
ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART
The trigger type should be LEVEL_HIGH. So fix it!
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220530080842.37024-2-manivannan.sadhasivam@linaro.org
Diffstat (limited to 'arch/arm/boot/dts/qcom-sdx55.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-sdx55.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index 1c2b208a5670..ef1da28f567c 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -206,7 +206,7 @@ blsp1_uart3: serial@831000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x00831000 0x200>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc 30>, <&gcc 9>; clock-names = "core", "iface"; |