diff options
| author | Biju Das <biju.das@bp.renesas.com> | 2017-12-20 20:02:00 +0000 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-12-21 12:21:55 +0100 |
| commit | 55e37da0309a2237cc8f14a43ba04b2fd2083c1c (patch) | |
| tree | 8f5d8f30550c42aebbe9cdc5f5dc94d4d0770804 /arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | |
| parent | 17d2e479d09e597c9915f0ab853edfa8f5010476 (diff) | |
ARM: dts: iwg22d-sodimm: Enable SGTL5000 audio codec
This patch enables SGTL5000 audio codec on the carrier board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts')
| -rw-r--r-- | arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 39ce7e7101c7..5d4b7d203f8d 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -26,6 +26,12 @@ stdout-path = "serial3:115200n8"; }; + audio_clock: audio_clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + vccq_sdhi0: regulator-vccq-sdhi0 { compatible = "regulator-gpio"; @@ -80,6 +86,23 @@ pinctrl-names = "default"; }; +&i2c5 { + pinctrl-0 = <&i2c5_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; + reg = <0x0a>; + clocks = <&audio_clock>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + }; +}; + &pci1 { status = "okay"; pinctrl-0 = <&usb1_pins>; @@ -102,6 +125,11 @@ function = "hscif1"; }; + i2c5_pins: i2c5 { + groups = "i2c5_b"; + function = "i2c5"; + }; + scif4_pins: scif4 { groups = "scif4_data_b"; function = "scif4"; |