diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-07-14 23:20:35 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-08-08 12:53:02 +0200 |
| commit | f947c02a0f86dffa5258ef347c6b6980953a9679 (patch) | |
| tree | 9b88f4e6330922c70dd4b092aac2cd724309898e /arch/arm/boot/dts/r8a7792.dtsi | |
| parent | 47db051c22a03d41eac0d8193f3fe37b4f9768e9 (diff) | |
ARM: dts: r8a7792: add CAN support
Define the generic R8A7792 parts of the CAN0/1 device nodes.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7792.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7792.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index af8020bfc030..1b96bf6393fb 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -456,6 +456,30 @@ status = "disabled"; }; + can0: can@e6e80000 { + compatible = "renesas,can-r8a7792", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e80000 0 0x1000>; + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7792_CLK_CAN0>, + <&rcan_clk>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + can1: can@e6e88000 { + compatible = "renesas,can-r8a7792", + "renesas,rcar-gen2-can"; + reg = <0 0xe6e88000 0 0x1000>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7792_CLK_CAN1>, + <&rcan_clk>, <&can_clk>; + clock-names = "clkp1", "clkp2", "can_clk"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + /* Special CPG clocks */ cpg_clocks: cpg_clocks@e6150000 { compatible = "renesas,r8a7792-cpg-clocks", |