diff options
| author | John Keeping <john@metanate.com> | 2019-06-03 15:34:35 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2019-06-04 15:34:41 +0200 |
| commit | 9dbf05bd8ae5b436b02c9845a350dec11c788a73 (patch) | |
| tree | 9c68cc3be35e90cab72b8dd694933f3f60363d82 /arch/arm/boot/dts/rk3288.dtsi | |
| parent | c87efcc3d1dfdf3f5ecb6558521825a21838dc30 (diff) | |
ARM: dts: rockchip: fix pwm-cells for rk3288's pwm3
This is the same as the other PWMs on this SoC and uses 3 cells.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 159d91180cee..766d1cf51a5b 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -710,7 +710,7 @@ pwm3: pwm@ff680030 { compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; - #pwm-cells = <2>; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_RKPWM>; |