diff options
| author | Andreas Färber <afaerber@suse.de> | 2019-10-23 11:21:45 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2020-04-12 23:59:26 +0200 |
| commit | a4516dc56ea88331ccb9672193c8dac81f47b061 (patch) | |
| tree | 94b362d44165424fba92f1f34951ecadfa8f42de /arch/arm/boot/dts/rtd1195.dtsi | |
| parent | 6f7f0d95380fa36b1102f3f8b8dc4e0f9a9af51f (diff) | |
ARM: dts: rtd1195: Add UART resets
Associate the UART nodes with the corresponding reset controller bits.
Acked-by: James Tai <james.tai@realtek.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'arch/arm/boot/dts/rtd1195.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rtd1195.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index 886845e52205..09acb99083c1 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -8,6 +8,7 @@ /memreserve/ 0x17fff000 0x00001000; #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset/realtek,rtd1195.h> / { compatible = "realtek,rtd1195"; @@ -179,6 +180,7 @@ reg = <0x800 0x400>; reg-shift = <2>; reg-io-width = <4>; + resets = <&iso_reset RTD1195_ISO_RSTN_UR0>; clock-frequency = <27000000>; status = "disabled"; }; @@ -190,6 +192,7 @@ reg = <0x200 0x100>; reg-shift = <2>; reg-io-width = <4>; + resets = <&reset2 RTD1195_RSTN_UR1>; clock-frequency = <27000000>; status = "disabled"; }; |