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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2016-06-08 01:40:44 +0200
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2017-12-31 15:50:19 +0100
commitb8d4c28b66eba0a3b59b95d1856cf49638dd8f48 (patch)
tree8c86976f0043cf6a121e27a187c7db349a08e50e /arch/arm/boot/dts/sama5d2.dtsi
parent5dbe15b51556f2e0257778fa6f4f5dc0dbd94032 (diff)
ARM: dts: at91: sama5d2: TC blocks are also simple-mfd and syscon devices
Add simple-mfd and syscon to the TC blocks to allow to register one of the channels as clocksource properly at boot time and free up the remaining channels for other use. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 659726889351..61f68e5c48e9 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -1094,7 +1094,9 @@
};
tcb0: timer@f800c000 {
- compatible = "atmel,at91sam9x5-tcb";
+ compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xf800c000 0x100>;
interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&clk32k>;
@@ -1102,7 +1104,9 @@
};
tcb1: timer@f8010000 {
- compatible = "atmel,at91sam9x5-tcb";
+ compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0xf8010000 0x100>;
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb1_clk>, <&clk32k>;