diff options
| author | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2020-01-10 23:27:44 +0100 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2020-04-13 13:00:08 +0200 |
| commit | 7ed609b0020fd1db5acde66248f5623328834b72 (patch) | |
| tree | 45b76a8af4a63f0253afee1403163db09a61a2ab /arch/arm/boot/dts/sama5d3_lcd.dtsi | |
| parent | 8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff) | |
ARM: dts: at91: sama5d3: switch to new clock bindings
Switch sama5d3 boards to the new PMC clock bindings.
This prevents the wb50n to use the out of spec rate for USART1.
Link: https://lore.kernel.org/r/20200110222744.1261464-1-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d3_lcd.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_lcd.dtsi | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi index 2cf046cd4e99..308d2fc276d6 100644 --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi +++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi @@ -16,7 +16,7 @@ compatible = "atmel,sama5d3-hlcdc"; reg = <0xf0030000 0x2000>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; clock-names = "periph_clk","sys_clk", "slow_clk"; status = "disabled"; @@ -192,23 +192,6 @@ }; }; }; - - pmc: pmc@fffffc00 { - periphck { - lcdc_clk: lcdc_clk { - #clock-cells = <0>; - reg = <36>; - }; - }; - - systemck { - lcdck: lcdck { - #clock-cells = <0>; - reg = <3>; - clocks = <&mck>; - }; - }; - }; }; }; }; |