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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2020-01-10 23:27:44 +0100
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2020-04-13 13:00:08 +0200
commit7ed609b0020fd1db5acde66248f5623328834b72 (patch)
tree45b76a8af4a63f0253afee1403163db09a61a2ab /arch/arm/boot/dts/sama5d3_mci2.dtsi
parent8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff)
ARM: dts: at91: sama5d3: switch to new clock bindings
Switch sama5d3 boards to the new PMC clock bindings. This prevents the wb50n to use the out of spec rate for USART1. Link: https://lore.kernel.org/r/20200110222744.1261464-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d3_mci2.dtsi')
-rw-r--r--arch/arm/boot/dts/sama5d3_mci2.dtsi11
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
index 3c83c1c36ac8..7141ee97ec3e 100644
--- a/arch/arm/boot/dts/sama5d3_mci2.dtsi
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -30,15 +30,6 @@
};
};
- pmc: pmc@fffffc00 {
- periphck {
- mci2_clk: mci2_clk {
- #clock-cells = <0>;
- reg = <23>;
- };
- };
- };
-
mmc2: mmc@f8004000 {
compatible = "atmel,hsmci";
reg = <0xf8004000 0x600>;
@@ -47,7 +38,7 @@
dma-names = "rxtx";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
- clocks = <&mci2_clk>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
clock-names = "mci_clk";
status = "disabled";
#address-cells = <1>;