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| author | Eugen Hristev <eugen.hristev@microchip.com> | 2022-05-03 16:31:27 +0300 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-05-13 16:26:32 +0300 |
| commit | b7e86ef7afd128577ff7bb0db0ae82d27d7ed7ad (patch) | |
| tree | a7e5532c18302423a4ed99afbad4b81341db9a0d /arch/arm/boot/dts/sama7g5.dtsi | |
| parent | a37bc730a572b863253c0244a798127317bd79e0 (diff) | |
ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
interrupt-parent is not to be used as a boolean property.
It is already present in the DT in the proper way it's supposed to be used:
interrupt-parent = <&gic>;
This is also reported by dtbs_check:
arch/arm/boot/dts/at91-sama7g5ek.dtb: interrupt-controller@e8c11000: interrupt-parent: True is not of type 'array'
From schema: /.local/lib/python3.8/site-packages/dtschema/schemas/interrupts.yaml
Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220503133127.64320-1-eugen.hristev@microchip.com
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Diffstat (limited to 'arch/arm/boot/dts/sama7g5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sama7g5.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index 4decd3a91a76..5cb9bd2ca5e8 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -857,7 +857,6 @@ #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; - interrupt-parent; reg = <0xe8c11000 0x1000>, <0xe8c12000 0x2000>; }; |