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authorEugen Hristev <eugen.hristev@microchip.com>2021-09-01 15:30:12 +0300
committerNicolas Ferre <nicolas.ferre@microchip.com>2021-09-15 10:35:29 +0200
commitc7472302df9e7f62105d65927758eb4e77cbf4ce (patch)
tree568d4a476d733e0886c84365dbb169c3177f8c98 /arch/arm/boot/dts/sama7g5.dtsi
parent2c9987f2edf432e78c871e53381cf2bc43192c3f (diff)
ARM: dts: at91: sama7g5: add node for the ADC
Add node for the ADC controller in sama7g5 SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210901123013.329792-10-eugen.hristev@microchip.com
Diffstat (limited to 'arch/arm/boot/dts/sama7g5.dtsi')
-rw-r--r--arch/arm/boot/dts/sama7g5.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index cc6be6db7b80..c9725d080e20 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -137,6 +137,22 @@
clocks = <&clk32k 0>;
};
+ adc: adc@e1000000 {
+ compatible = "microchip,sama7g5-adc";
+ reg = <0xe1000000 0x200>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clock-rates = <100000000>;
+ clock-names = "adc_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+ dma-names = "rx";
+ atmel,min-sample-rate-hz = <200000>;
+ atmel,max-sample-rate-hz = <20000000>;
+ atmel,startup-time-ms = <4>;
+ status = "disabled";
+ };
+
sdmmc0: mmc@e1204000 {
compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
reg = <0xe1204000 0x4000>;