diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2021-11-01 19:36:30 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2021-12-03 11:44:36 -0600 |
| commit | cb25b11943cbcc5a34531129952870420f8be858 (patch) | |
| tree | 8386b977a9429a9119b193f28f9a6d8cbc0addaf /arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | |
| parent | d58071a8a76d779eedab38033ae4c821c30295a5 (diff) | |
ARM: socfpga: dts: fix qspi node compatible
The QSPI flash node needs to have the required "jedec,spi-nor" in the
compatible string.
Fixes: 1df99da8953 ("ARM: dts: socfpga: Enable QSPI in Arria10 devkit")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5_socdk.dts')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts index 6f138b2b2616..51bb436784e2 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts @@ -124,7 +124,7 @@ flash0: n25q00@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00"; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; /* chip select */ spi-max-frequency = <100000000>; |