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authorKory Maincent <kory.maincent@bootlin.com>2022-11-02 18:10:09 +0100
committerArnd Bergmann <arnd@arndb.de>2022-11-14 16:10:12 +0100
commit3f6f5ee179183068ef92fb58ca402db4bd6e769f (patch)
treefc2ea6e8669bbacf3e720f8fcb9f6721f74d9aa1 /arch/arm/boot/dts/spear600.dtsi
parent0336e2ce34e7a89832b6c214f924eb7bc58940be (diff)
arm: dts: spear600: Add ssp controller nodes
The SPEAr600 has three Synchronous serial port to enables synchronous serial communication with slave or master peripherals (SPI). Lets add these nodes to be able to use them. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/spear600.dtsi')
-rw-r--r--arch/arm/boot/dts/spear600.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index 9d5a04a46b14..6b67c0ceaed9 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -207,6 +207,36 @@
interrupts = <6>;
status = "disabled";
};
+
+ ssp1: spi@d0100000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0xd0100000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&vic0>;
+ interrupts = <26>;
+ status = "disabled";
+ };
+
+ ssp2: spi@d0180000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0xd0180000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&vic0>;
+ interrupts = <27>;
+ status = "disabled";
+ };
+
+ ssp3: spi@d8180000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0xd8180000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&vic1>;
+ interrupts = <5>;
+ status = "disabled";
+ };
};
};
};