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authorLinus Walleij <linus.walleij@linaro.org>2020-12-19 21:31:55 +0100
committerLinus Walleij <linus.walleij@linaro.org>2021-01-13 13:12:20 +0100
commit5282da459a97640ad2d12029665fa8c0a09d72a2 (patch)
treea49ee27134d1f32bda25adf51d69d135a324522f /arch/arm/boot/dts/ste-hrefv60plus.dtsi
parentace79dd1b0d99a3789809d94a00d230d76f61c57 (diff)
ARM: dts: ux500: Push VMMCI down to each tree
The setting of VMMCI differs so much between different boards that we need to handle it on a per-board basis rather that complicating things by overriding stuff from the included DTSI:s. Push it down into top-level tree instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-hrefv60plus.dtsi')
-rw-r--r--arch/arm/boot/dts/ste-hrefv60plus.dtsi16
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
index ee0bf00a94b8..05ea12e6df1c 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dtsi
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dtsi
@@ -194,12 +194,6 @@
cd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; // 95
};
- vmmci: regulator-gpio {
- gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
- enable-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
pinctrl {
/*
* Set this up using hogs, as time goes by and as seems fit, these
@@ -224,16 +218,6 @@
pins = "GPIO95_E8";
ste,config = <&gpio_in_pu>;
};
- /* VMMCI level-shifter enable */
- default_hrefv60_cfg2 {
- pins = "GPIO169_D22";
- ste,config = <&gpio_out_hi>;
- };
- /* VMMCI level-shifter voltage select */
- default_hrefv60_cfg3 {
- pins = "GPIO5_AG6";
- ste,config = <&gpio_out_hi>;
- };
};
};
ipgpio {