ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>

1 files changed, 0 insertions, 592 deletions

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
deleted file mode 100644
index e3564b74a779..000000000000
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ /dev/null
@@ -1,592 +0,0 @@
-/*
- * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include "armv7-m.dtsi"
-#include <dt-bindings/clock/stm32fx-clock.h>
-#include <dt-bindings/mfd/stm32f7-rcc.h>
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	clocks {
-		clk_hse: clk-hse {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <0>;
-		};
-
-		clk-lse {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <32768>;
-		};
-
-		clk-lsi {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <32000>;
-		};
-
-		clk_i2s_ckin: clk-i2s-ckin {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <48000000>;
-		};
-	};
-
-	soc {
-		timers2: timers@40000000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40000000 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@1 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <1>;
-				status = "disabled";
-			};
-		};
-
-		timers3: timers@40000400 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40000400 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@2 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <2>;
-				status = "disabled";
-			};
-		};
-
-		timers4: timers@40000800 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40000800 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@3 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <3>;
-				status = "disabled";
-			};
-		};
-
-		timers5: timers@40000c00 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40000C00 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@4 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <4>;
-				status = "disabled";
-			};
-		};
-
-		timers6: timers@40001000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40001000 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
-			clock-names = "int";
-			status = "disabled";
-
-			timer@5 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <5>;
-				status = "disabled";
-			};
-		};
-
-		timers7: timers@40001400 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40001400 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
-			clock-names = "int";
-			status = "disabled";
-
-			timer@6 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <6>;
-				status = "disabled";
-			};
-		};
-
-		timers12: timers@40001800 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40001800 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM12)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@11 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <11>;
-				status = "disabled";
-			};
-		};
-
-		timers13: timers@40001c00 {
-			compatible = "st,stm32-timers";
-			reg = <0x40001C00 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-		};
-
-		timers14: timers@40002000 {
-			compatible = "st,stm32-timers";
-			reg = <0x40002000 0x400>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-		};
-
-		rtc: rtc@40002800 {
-			compatible = "st,stm32-rtc";
-			reg = <0x40002800 0x400>;
-			clocks = <&rcc 1 CLK_RTC>;
-			assigned-clocks = <&rcc 1 CLK_RTC>;
-			assigned-clock-parents = <&rcc 1 CLK_LSE>;
-			interrupt-parent = <&exti>;
-			interrupts = <17 1>;
-			st,syscfg = <&pwrcfg 0x00 0x100>;
-			status = "disabled";
-		};
-
-		usart2: serial@40004400 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40004400 0x400>;
-			interrupts = <38>;
-			clocks = <&rcc 1 CLK_USART2>;
-			status = "disabled";
-		};
-
-		usart3: serial@40004800 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40004800 0x400>;
-			interrupts = <39>;
-			clocks = <&rcc 1 CLK_USART3>;
-			status = "disabled";
-		};
-
-		usart4: serial@40004c00 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40004c00 0x400>;
-			interrupts = <52>;
-			clocks = <&rcc 1 CLK_UART4>;
-			status = "disabled";
-		};
-
-		usart5: serial@40005000 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40005000 0x400>;
-			interrupts = <53>;
-			clocks = <&rcc 1 CLK_UART5>;
-			status = "disabled";
-		};
-
-		i2c1: i2c@40005400 {
-			compatible = "st,stm32f7-i2c";
-			reg = <0x40005400 0x400>;
-			interrupts = <31>,
-				     <32>;
-			resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
-			clocks = <&rcc 1 CLK_I2C1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		i2c2: i2c@40005800 {
-			compatible = "st,stm32f7-i2c";
-			reg = <0x40005800 0x400>;
-			interrupts = <33>,
-				     <34>;
-			resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
-			clocks = <&rcc 1 CLK_I2C2>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		i2c3: i2c@40005c00 {
-			compatible = "st,stm32f7-i2c";
-			reg = <0x40005c00 0x400>;
-			interrupts = <72>,
-				     <73>;
-			resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
-			clocks = <&rcc 1 CLK_I2C3>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		i2c4: i2c@40006000 {
-			compatible = "st,stm32f7-i2c";
-			reg = <0x40006000 0x400>;
-			interrupts = <95>,
-				     <96>;
-			resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
-			clocks = <&rcc 1 CLK_I2C4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		cec: cec@40006c00 {
-			compatible = "st,stm32-cec";
-			reg = <0x40006C00 0x400>;
-			interrupts = <94>;
-			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
-			clock-names = "cec", "hdmi-cec";
-			status = "disabled";
-		};
-
-		usart7: serial@40007800 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40007800 0x400>;
-			interrupts = <82>;
-			clocks = <&rcc 1 CLK_UART7>;
-			status = "disabled";
-		};
-
-		usart8: serial@40007c00 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40007c00 0x400>;
-			interrupts = <83>;
-			clocks = <&rcc 1 CLK_UART8>;
-			status = "disabled";
-		};
-
-		timers1: timers@40010000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40010000 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM1)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@0 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <0>;
-				status = "disabled";
-			};
-		};
-
-		timers8: timers@40010400 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40010400 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM8)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@7 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <7>;
-				status = "disabled";
-			};
-		};
-
-		usart1: serial@40011000 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40011000 0x400>;
-			interrupts = <37>;
-			clocks = <&rcc 1 CLK_USART1>;
-			status = "disabled";
-		};
-
-		usart6: serial@40011400 {
-			compatible = "st,stm32f7-uart";
-			reg = <0x40011400 0x400>;
-			interrupts = <71>;
-			clocks = <&rcc 1 CLK_USART6>;
-			status = "disabled";
-		};
-
-		sdio2: mmc@40011c00 {
-			compatible = "arm,pl180", "arm,primecell";
-			arm,primecell-periphid = <0x00880180>;
-			reg = <0x40011c00 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
-			clock-names = "apb_pclk";
-			interrupts = <103>;
-			max-frequency = <48000000>;
-			status = "disabled";
-		};
-
-		sdio1: mmc@40012c00 {
-			compatible = "arm,pl180", "arm,primecell";
-			arm,primecell-periphid = <0x00880180>;
-			reg = <0x40012c00 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
-			clock-names = "apb_pclk";
-			interrupts = <49>;
-			max-frequency = <48000000>;
-			status = "disabled";
-		};
-
-		syscfg: syscon@40013800 {
-			compatible = "st,stm32-syscfg", "syscon";
-			reg = <0x40013800 0x400>;
-		};
-
-		exti: interrupt-controller@40013c00 {
-			compatible = "st,stm32-exti";
-			interrupt-controller;
-			#interrupt-cells = <2>;
-			reg = <0x40013C00 0x400>;
-			interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
-		};
-
-		timers9: timers@40014000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "st,stm32-timers";
-			reg = <0x40014000 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM9)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-
-			timer@8 {
-				compatible = "st,stm32-timer-trigger";
-				reg = <8>;
-				status = "disabled";
-			};
-		};
-
-		timers10: timers@40014400 {
-			compatible = "st,stm32-timers";
-			reg = <0x40014400 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-		};
-
-		timers11: timers@40014800 {
-			compatible = "st,stm32-timers";
-			reg = <0x40014800 0x400>;
-			clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
-			clock-names = "int";
-			status = "disabled";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				#pwm-cells = <3>;
-				status = "disabled";
-			};
-		};
-
-		pwrcfg: power-config@40007000 {
-			compatible = "st,stm32-power-config", "syscon";
-			reg = <0x40007000 0x400>;
-		};
-
-		crc: crc@40023000 {
-			compatible = "st,stm32f7-crc";
-			reg = <0x40023000 0x400>;
-			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(CRC)>;
-			status = "disabled";
-		};
-
-		rcc: rcc@40023800 {
-			#reset-cells = <1>;
-			#clock-cells = <2>;
-			compatible = "st,stm32f746-rcc", "st,stm32-rcc";
-			reg = <0x40023800 0x400>;
-			clocks = <&clk_hse>, <&clk_i2s_ckin>;
-			st,syscfg = <&pwrcfg>;
-			assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
-			assigned-clock-rates = <1000000>;
-		};
-
-		dma1: dma-controller@40026000 {
-			compatible = "st,stm32-dma";
-			reg = <0x40026000 0x400>;
-			interrupts = <11>,
-				     <12>,
-				     <13>,
-				     <14>,
-				     <15>,
-				     <16>,
-				     <17>,
-				     <47>;
-			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
-			#dma-cells = <4>;
-			status = "disabled";
-		};
-
-		dma2: dma-controller@40026400 {
-			compatible = "st,stm32-dma";
-			reg = <0x40026400 0x400>;
-			interrupts = <56>,
-				     <57>,
-				     <58>,
-				     <59>,
-				     <60>,
-				     <68>,
-				     <69>,
-				     <70>;
-			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
-			#dma-cells = <4>;
-			st,mem2mem;
-			status = "disabled";
-		};
-
-		usbotg_hs: usb@40040000 {
-			compatible = "st,stm32f7-hsotg";
-			reg = <0x40040000 0x40000>;
-			interrupts = <77>;
-			clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
-			clock-names = "otg";
-			g-rx-fifo-size = <256>;
-			g-np-tx-fifo-size = <32>;
-			g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
-			status = "disabled";
-		};
-
-		usbotg_fs: usb@50000000 {
-			compatible = "st,stm32f4x9-fsotg";
-			reg = <0x50000000 0x40000>;
-			interrupts = <67>;
-			clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
-			clock-names = "otg";
-			status = "disabled";
-		};
-	};
-};
-
-&systick {
-	clocks = <&rcc 1 0>;
-	status = "okay";
-};